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Jin-Hong
Jin-Hong Ahn, Ichon-Shi KR
| Patent application number | Description | Published |
|---|---|---|
| 20110085405 | SEMICONDUCTOR MEMORY DEVICE HAVING ADVANCED TAG BLOCK - A semiconductor memory device includes a row decoding block for decoding an inputted address to thereby generate a logical unit cell block address and a decoded word line address; a tag block for converting the logical unit cell block address into a physical unit cell block address; a decoded address latching block for latching the decoded word line address to thereby output the decoded word line address as a word line activation signal in response to the physical unit cell block; and a cell area for outputting a data, which is stored therein, in response to the word line activation signal. | 04-14-2011 |
Jin-Hong Ahn, Kyoungki-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20100027362 | SEMICONDUCTOR MEMORY DEVICE FOR LOW VOLTAGE - A semiconductor memory device includes a first cell array including a plurality of unit cells and a bit line sense amplifying unit for sensing and amplifying data signals stored in the unit cells. Each unit cell is provided with a PMOS transistor and a capacitor. Therefore, the semiconductor memory device efficiently operates with low voltage without any degradation of operation speed. | 02-04-2010 |
| 20100188914 | SELF REFRESH OPERATION OF SEMICONDUCTOR MEMORY DEVICE - A method for driving a semiconductor memory device, includes initializing first data corresponding to a refresh time of each corresponding row included in a cell array; storing second data corresponding to column data included in the first row after entering a self refresh mode; setting the first data corresponding to the first row by detecting the refresh time of the first row while performing refresh operations on the other rows in the cell array according to a refresh period selected based on the corresponding first data for predetermined refresh cycles, wherein the refresh operation is not performed on the first row during the predetermined refresh cycles; restoring the second data to the first row; and repeating the above steps for the other rows to thereby set the corresponding first data until the setting step is completed for all rows or the self refresh mode expires. | 07-29-2010 |
| 20100188915 | SELF REFRESH OPERATION OF SEMICONDUCTOR MEMORY DEVICE - A method for driving a semiconductor memory device, includes initializing first data corresponding to a refresh time of each corresponding row included in a cell array; storing second data corresponding to column data included in the first row after entering a self refresh mode; setting the first data corresponding to the first row by detecting the refresh time of the first row while performing refresh operations on the other rows in the cell array according to a refresh period selected based on the corresponding first data for predetermined refresh cycles, wherein the refresh operation is not performed on the first row during the predetermined refresh cycles; restoring the second data to the first row; and repeating the above steps for the other rows to thereby set the corresponding first data until the setting step is completed for all rows or the self refresh mode expires. | 07-29-2010 |
| 20110114736 | INTEGRATED CIRCUIT WITH EMBEDDED RFID - An integrated circuit (IC) die includes a high capacitance solid state circuit region configured to perform predetermined operations and an RFID block configured for wireless communication with an external source. The RFID block is configured to record results from a plurality of stages of a manufacturing process. The RFID block is further configured to generate an internal BIST command in response to an external command wirelessly received by the RFID. The integrated circuit die also includes a built-in self-test (BIST) block coupled to carry out testing of the high capacitance solid state circuit region in response to the internal BIST command. The RFID block is configured to be capable of storing store information relating to the testing. The RFID block is further configured to enable wireless retrieval of the test results from the testing of the high capacitance solid state circuit region. | 05-19-2011 |
Jin-Hong Chang, Hsin Ying City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100059243 | Anti-electromagnetic interference material arrangement - Anti-EMI material arrangement, comprising a plurality of electrically conducting elongated particles, which are irregularly distributed within a substrate, forming a web of electrically conducting paths, so that incoming electromagnetic waves are attenuated. Optionally, spherical particles are added. Furthermore, optionally, absorbing particles are added to dissipate energy of electromagnetic waves. | 03-11-2010 |
Jin-Hong Chen, Forest Hillls, NY US
| Patent application number | Description | Published |
|---|---|---|
| 20100156413 | CORRECTED NUCLEAR MAGNETIC RESONANCE IMAGING USING MAGNETIZATION TRANSFER - Techniques for corrected nuclear magnetic resonance (NMR) data include applying a presaturation radio frequency (RF) magnetic field different from a fat molecule resonance for a particular time to a target tissue; and applying a first measurement RF magnetic field within a first time after the particular time. Correction nuclear magnetic resonance (NMR) data from the target tissue is determined based on first NMR data received in response to applying the first measurement RF magnetic field. In some embodiments, a second measurement RF magnetic field is also applied in a second time different from both the particular time and the first time. Corrected NMR data is determined by subtracting the correction NMR data from second NMR data received in response to applying the second measurement RF magnetic field. Among other applications, these techniques allow distinguishing either fat or proteins in edemas, or both, from proteins in other tissues. | 06-24-2010 |
Jin-Hong Kim, Suwon-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20100065912 | STACKED SEMICONDUCTOR DEVICE AND RELATED METHOD - A stacked semiconductor device and a method for fabricating the stacked semiconductor device are disclosed. The stacked semiconductor device includes a first insulating interlayer having an opening that partially exposes a substrate, wherein the substrate includes single crystalline silicon, and a first seed pattern that fills the opening, wherein the first seed pattern has an upper portion disposed over the opening, and the upper portion is tapered away from the substrate. The stacked semiconductor device further includes a second insulating interlayer formed on the first insulating interlayer, wherein a trench that exposes the upper portion of the first seed pattern penetrates the second insulating interlayer, and a first single crystalline silicon structure that fills the trench. | 03-18-2010 |
Jin-Hong Kim, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20080197402 | Methods of Forming Nonvolatile Memory Devices and Memory Devices Formed Thereby - Methods of forming non-volatile memory devices include forming a device isolation layer and a gate pattern of a non-volatile memory cell transistor, on a semiconductor substrate. This gate pattern includes a floating gate electrode and a control gate line that extends on the floating gate electrode and on the device isolation layer. At least a first portion of a first sidewall of the gate pattern is then covered with a first mask that exposes upper corners of the control gate line. The device isolation layer is then selectively etched at a first rate to define an at least partial opening therein. During this etching step, the upper corners of the control gate line are also etched back at a second rate less than the first rate. | 08-21-2008 |
Jin-Hong Lee, Daejeon-City KR
Jin-Hong Park, Seoul KR
| Patent application number | Description | Published |
|---|---|---|
| 20090184959 | Method and apparatus for rendering - A rendering apparatus and method are provided. The rendering method includes: reading a block, corresponding to a fragment, from among compressed blocks stored in a depth buffer, by considering frequency information corresponding to the fragment and prepared in advance; and performing a depth test for the fragment by considering the restored block. | 07-23-2009 |
Jin-Hong Park, Daegu-City KR
| Patent application number | Description | Published |
|---|---|---|
| 20080311308 | Composition for Functional Coatings, Film Formed Therefrom and Method for Forming the Composition and the Film - The present invention relates to compositions for functional films, and more particularly to compositions for functional films such as a heat ray screening film compatible with hydrolic or alcoholic and anti-hydrolic resin binder, a near infrared screening film, a chrominance correcting film, a conductive film, a magnetic film, a ferromagnetic film, a dielectric film, a ferroelectric film, an electrochromic film, an electroluminescence film, an insulating film, a reflecting film, a reflection preventing film, a catalyst film, a photocatalyst film, a light selectively absorbing film, a hard film, and a heat resisting film, films formed therefrom, and a method of forming the compositions and the films. | 12-18-2008 |
Jin-Hong Park, Hwaseong-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20100149502 | Method of detecting reticle errors - A method of detecting reticle error may include using an optical source of an exposure unit to cause light to be incident on a reticle installed in the exposure unit, and detecting the reticle error using only 0 | 06-17-2010 |
| 20100190340 | Methods of forming fine patterns using a nanoimprint lithography - In a method of forming fine patterns, a photocurable coating layer is formed on a substrate. A first surface of a template makes contact with the photocurable coating layer. The first surface of the template includes at least two first patterns having a first dispersion degree of sizes, and at least one portion of the first surface of the template includes a photo attenuation member. A light is irradiated onto the photocurable coating layer through the template to form a cured coating layer including second patterns having a second dispersion degree of sizes. The second patterns are generated from the first patterns and the second dispersion degree is less than the first dispersion degree. The template is separate from the cured coating layer. A size dispersion degree of the patterns used in a nanoimprint lithography process may be adjusted by the light attenuation member, so that the fine patterns may be formed to have an improved size dispersion degree. | 07-29-2010 |