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Jianping

Jianping Chen, Shanghai CN

Patent application numberDescriptionPublished
20090062233Modified starch material of biocompatible hemostasis - A modified starch material for biocompatible hemostasis, biocompatible adhesion prevention, tissue healing promotion, absorbable surgical wound sealing and tissue bonding, when applied as a biocompatible modified starch to the tissue of animals. The modified starch material produces hemostasis, reduces bleeding of the wound, extravasation of blood and tissue exudation, preserves the wound surface or the wound in relative wetness or dryness, inhibits the growth of bacteria and inflammatory response, minimizes tissue inflammation, and relieves patient pain. Any excess modified starch not involved in hemostatic activity is readily dissolved and rinsed away through saline irrigation during operation. After treatment of surgical wounds, combat wounds, trauma and emergency wounds, the modified starch hemostatic material is rapidly absorbed by the body without the complications associated with gauze and bandage removal.03-05-2009

Jianping Fan, Orange, CA US

Patent application numberDescriptionPublished
20100213857Method and appratus of driving LED and OLED devices - A group of novel power conversion concept is developed with this invention for LED and OLED drive applications. The concept utilizes a single power conversion stage to fulfill multiple functions, including Power Factor Correction, DC voltage to DC current conversion, or DC voltage to DC voltage conversion etc. that are necessary for driving LED devices from an AC power input. Multiple dimming control schemes have also been developed to facilitate wide range of application requirements and enable the system to work with different input power format including AC mains power and variable AC voltage from the existing AC dimmer installations.08-26-2010
20110068700Method and apparatus for driving multiple LED devices - A series of methods of driving multiple LED devices with high efficiency balancing technique is disclosed. The regulation of the LED current is accomplished by switching operation to compensate the difference of the LED operating voltage. Reactive components are also employed to construct non-dissipative balancing networks to drive multiple LED strings with low losses. Additionally, a series of concept is presented to drive the LED devices from PFC voltage directly with low cost circuit architecture.03-24-2011
20110216567Single switch inverter - A novel concept of converting a DC input to an AC output with a single active switch is disclosed. A series of topologies are developed to support the needs of different applications. Particular requirements for driving modern lighting devices are also addressed and supporting solutions are elaborated.09-08-2011

Jianping Fang, Lakewood, CA US

Patent application numberDescriptionPublished
20090308783Recordable card holder unit - The present invention discloses a recordable card holder having an electronic record device invisibly perched within a plastic ornament body for supplementing a recording function of a card holder. The present invention discloses a way to personalize gifts of flower bouquets, flow baskets and gift boxes, and thus enhance gift value12-17-2009

Jianping Han, Hung Hom HK

Patent application numberDescriptionPublished
20120000251ITEMS OF CLOTHING HAVING SHAPE MEMORY - A method for making items of clothing having shape memory, the method comprising: synthesizing (01-05-2012

Jianping Jin, Singapore SG

Patent application numberDescriptionPublished
20100232915 Apparatus For Handling A Semiconductor Component - An apparatus for handling or transferring a semiconductor component. The apparatus comprises a first structure and a second structure coupled thereto. The first structure and the second structure define a vacuum chamber therebetween. The second structure comprises at least one module coupled thereto. Each module comprises a passageway defined therethrough. Vacuum is applied through the passageway for facilitating pick up of the semiconductor component at a first position and for securing the semiconductor component to the module during displacement of the module from the first position to a second position. The apparatus comprises a plunger. Displacement of the plunger from a retracted position to an extended position impedes fluid communication between the passageway of the module and the chamber. Displacement of the plunger to the extended position further causes purging of air through the passageway of the module to thereby detach the semiconductor component from the module. A method for transferring the semiconductor component using the apparatus is also provided by the present invention.09-16-2010

Jianping Shen, Los Angeles, CA US

Patent application numberDescriptionPublished
20100035205Non-90-Degree Ergonomically-Shaped Dental Prophylaxis Angle with a Straight Driving Shaft - A disposable dental angle with a one-piece hollow housing, having the axis of its head section angled obtusely with respect to the axis of its tail section, is provided. The obtusely angled front aperture of the head section of the housing allows insertion of a driven rotor such that the driven rotor is positioned with an obtuse angle to the driving shaft in the end aperture of the tail section of the housing. The obtuse angle structure facilitates teeth cleaning operations by allowing the dental angle to easily reach all areas of the mouth and making practitioners feel more comfortable by allowing to maintain an ergonomically correct neutral wrist position and therefore reducing hand fatigue. A horseshoe-like snap retainer fits within the head section of the housing over the driven rotor to retain the rotor from coming out. A similar horseshoe-like snap retainer fits within the tail section of the housing over the driving shaft to retain the shaft firmly such that the gear of the driven rotor is always properly coupled to the matching gear of the driving shaft. The driving shaft transfers the rotation from a dental tool to the driven rotor for the purpose of tooth prophy using a cleaning cup.02-11-2010

Jianping Su, Irvine, CA US

Patent application numberDescriptionPublished
20110009741Endovascular Optical Coherence Tomography Device - An endovascular OCT probe is included in an endovascular access device for intravascular imaging. The probe includes a hollow coil wire defining an axial lumen of the endovascular access device. A single mode optical fiber for transmitting light is disposed in the axial lumen of the hollow coil wire so that translation and rotation of the hollow coil wire carrying the optical fiber within the endovascular access device is stabilized for scanning endovascular tissue with at least 5 microns resolution. An optic element directs light from and into the optical fiber at a distal tip of the optical fiber and is coupled to or fixed to the distal end of the optical fiber. The optic element and the distal end of the optical fiber is disposed within a glass ferule to protect it from damage.01-13-2011

Jianping Wang, Changzhou CN

Patent application numberDescriptionPublished
20100065047All around radiation heating apparatus - The present invention provides a safer all-around radiation heating assembly than similar traditional heaters. As typical with traditional heaters, a shroud is used to surroundably cover a portable liquid propane tank. To replace the portable liquid propane tank, the shroud must be continuously raised to a predetermined height while a service person accesses the propane tank. There is a danger that if and when the shroud drops, a spark could be created resulting in igniting highly flammable escaped propane gas. The present invention overcomes dangers associated with the traditional heaters by eliminating the spark creation danger and by introducing a ventilation system to allow any leaked propane gas to escape away from the heater.03-18-2010

Jianping Wang, Jining CN

Patent application numberDescriptionPublished
20100162677Embedded type system positioning spinning method - On each draft element of a ring spinning frame, two pieces of short-staple roving from the roving bobbin enter into the draft mechanism to be drafted though a guide funnel in parallel, two pieces of filament are fed from the back of the front roller, and combine with two pieces of roving at front jaw respectively. The drafted two pieces of roving and filament are output from the front jaw and enter into the twisting triangle area to be twisted, and then are wound onto a yarn bobbin to produce yarn. Based on the relative position of the two pieces of roving and two pieces of filament, different yarns can be produced. Furthermore, multi-component yarn, such as core structure, wrapped structure, strand-like structure, can be produced on a ring spinning frame. The structure of yarn can be precisely determined. Special fiber yarn can be produced on traditional spinning frame.07-01-2010

Jianping Wang, Yiwu CN

Patent application numberDescriptionPublished
20080306027Fluoroalkoxycombretastatin Derivatives, Method For Producing the Same and Use Thereof - Combretastatin derivatives of formula (I), preparation and use thereof are disclosed, wherein: R12-11-2008

Jianping Wang, Chengdu CN

Patent application numberDescriptionPublished
20110140621CIRCUITS AND METHODS FOR CONTROLLING A LIGHT SOURCE - A driving circuit for controlling a light source includes a frequency controller and a switch module. The frequency controller is operable for receiving a first dimming signal for controlling the light source to achieve a predetermined brightness, and for generating a second dimming signal having a frequency out of one or more predetermined ranges according to the first dimming signal when the frequency of the first dimming signal is within the predetermined ranges. The switch module coupled to the frequency controller is operable for switching on and off alternately to achieve the predetermined brightness of the light source according to the second dimming signal when the frequency of the first dimming signal is within the predetermined ranges and according to the first dimming signal when the frequency of the first dimming signal is out of the predetermined ranges.06-16-2011

Jianping Xu, Portland, OR US

Patent application numberDescriptionPublished
20090321893Multi-die integrated circuit device and method - In some embodiments, provided is an integrated circuit with a first die coupled to a second die. The second die has through-silicon vias disposed through it to provide power references to the first die. The through-silicon vias are laterally re-positionable without inhibiting circuit sections in the second die.12-31-2009
20110090182DIGITAL SIGNATURE COLLECTION AND AUTHENTICATION - A digital signature collection and authentication system includes an ink pen having an ultrasonic transmitter that transmits ultrasonic energy to a plurality of ultrasonic receivers. A computer triangulates the location of the pen versus time to generate the signature shape, and to generate velocity and acceleration data. The pen also includes a pressure sensitive tip to record pressure applied to the pen tip. The pen also includes a higher frequency burst transmitter useful to generate a time reference, and to transmit the pressure information. The computer packetizes the shape, velocity, acceleration, and pressure data with a time stamp and an IP address or phone number, encrypts the packet and sends it to a host computer for authentication.04-21-2011
20110268457METHOD AND APPARATUS FOR OPTICAL SIGNALING - A method and apparatus for optical signaling. In one embodiment, a laser driver converts a digital voltage sequence to a current signal having a bias mode adjustable by a bias control and a modulation mode adjustable by a modulation control. A laser generates an optical signal responsive to the current signal of the laser driver. In one embodiment, a photo-detector receives an optical signal and generates a single ended current signal. A transimpedance amplifier circuit converts the single ended current signal to a differential voltage signal. A clock recovery circuit generates an aligned clock signal and a sampler circuit uses the aligned clock signal to retrieve a digital voltage sequence.11-03-2011

Patent applications by Jianping Xu, Portland, OR US

Jianping Xu, Chengdu CN

Patent application numberDescriptionPublished
20080197812Topology and method for dynamic charging current allocation - In one embodiment, a battery management system includes a charger controller for controlling a charging current of a battery according to a status of a load which is powered by the battery, and a counter coupled to the charger controller for determining a charging time according to such status. Advantageously, a first charging current is selected when the load is off. A second charging current that is less than the first charging current is selected when the load is on. Furthermore, a frequency of the counter is set to a first frequency when the load is off. The frequency is set to a second frequency that is less than the first frequency when the load is on.08-21-2008

Jianping Xu, Pleasanton, CA US

Patent application numberDescriptionPublished
20100129819METHODS AND COMPOSITIONS IN PARTICLE-BASED DETECTION OF TARGET MOLECULES USING LINKING MOLECULES - Methods and compositions which can be used to increase the strength and/or probability of forming a binding complex comprising a target molecule and a substrate are disclosed. In one aspect, linking molecules are disclosed which can be used to increase the number of intra-complex binding interactions. Covalent bonds can be introduced to further increase the strength of these binding interactions. Inter-complex cross-linking can be utilized in connection with these methods to further strengthen and stabilize the disclosed binding complexes.05-27-2010

Jianping Yan, Milpitas, CA US

Patent application numberDescriptionPublished
20100287430MULTIPLE-CAPTURE DFT SYSTEM TO REDUCE PEAK CAPTURE POWER DURING SELF-TEST OR SCAN TEST - A method for providing ordered capture clocks to detect or locate faults within N clock domains and faults crossing any two clock domains in an integrated circuit or circuit assembly in scan-test or self-test mode, where N>1, each clock domain having one capture clock and a plurality of scan cells, each capture clock comprising a plurality of capture clock pulses; said method comprising: (a) generating and shifting-in N test stimuli to all said scan cells within said N clock domains in said integrated circuit or circuit assembly during a shift-in operation; (b) applying an ordered sequence of capture clocks to all said scan cells within said N clock domains, the ordered sequence of capture clocks comprising at least a plurality of capture clock pulses from two or more selected capture clocks placed in a sequential order such that all clock domains are never triggered simultaneously during a capture operation; and (c) analyzing output responses of all said scan cells to locate any faults therein.11-11-2010

Jianping Yan, Milipitas, CA US

Patent application numberDescriptionPublished
20110047426METHOD AND APPARATUS FOR LOW-PIN-COUNT SCAN COMPRESSION - A low-pin-count scan compression method and apparatus for reducing test data volume and test application time in a scan-based integrated circuit. The scan-based integrated circuit contains one or more scan chains, each scan chain comprising one or more scan cells coupled in series. The method and apparatus includes a programmable pipelined decompressor comprising one or more shift registers, a combinational logic network, and an optional scan connector. The programmable pipelined decompressor decompresses a compressed scan pattern on its compressed scan inputs and drives the generated decompressed scan pattern at the output of the programmable pipelined decompressor to the scan data inputs of the scan-based integrated circuit. Any input constraints imposed by said_combinational logic network are incorporated into an automatic test pattern generation (ATPG) program for generating the compressed scan pattern for one or more selected faults in one-step.02-24-2011

Jianping Yan, Miepitas, CA US

Patent application numberDescriptionPublished
20100138709METHOD AND APPARATUS FOR DELAY FAULT COVERAGE ENHANCEMENT - A hybrid clocking scheme for simultaneously detecting a b-cycle path-delay fault in a b-cycle (false) path and a c-cycle path-delay fault in a c-cycle (false) path using at least n+1 at-speed clock pulses during a capture operation in a clock domain in a scan design or a scan-based BIST design, where 1<=b<=c<=n. The scan design or BIST design includes multiple scan chains, each scan chain comprising multiple scan cells coupled in series. The design includes one or more clock domains each running at its intended operating frequency or at-speed. The hybrid clocking scheme comprises at least one at-speed shift clock pulse or one at-speed capture clock pulse immediately followed by at least two at-speed capture clock pulses during the capture operation to simultaneously detect the b-cycle path-delay fault and the c-cycle path-delay fault within the clock domain.06-03-2010

Jianping Yang, Shanghai CN

Patent application numberDescriptionPublished
20100009487ONO Spacer Etch Process to Reduce Dark Current - A method of forming a CMOS image sensor device. The method includes providing a semiconductor substrate having a P-type impurity characteristic. The semiconductor substrate includes a surface region. The method includes forming a gate oxide layer overlying the surface region and forming a first gate structure overlying a first portion of the gate oxide layer, the first gate structure has a top surface region and at least a side region. The method forms an N-type impurity region in a portion of the semiconductor substrate to form a photodiode device region from the N-type impurity region and the P-type impurity. The method includes forming a blanket spacer layer including an oxide on nitride on oxide structure overlying at least the first gate structure; and forming one or more spacer structures using the blanket spacer layer for the first gate structure while maintaining a portion of the oxide layer from the oxide on nitride on oxide overlying at least the photo-diode device region01-14-2010
20100015745METHOD AND STRUCTURE FOR A CMOS IMAGE SENSOR USING A TRIPLE GATE PROCESS - A method of forming a CMOS image sensor device, the method includes providing a semiconductor substrate having a P-type impurity characteristic including a surface region. The method form a first thickness of silicon dioxide in a first region of the surface region, a second thickness of silicon dioxide in a second region of the surface region, and a third thickness of silicon dioxide in a third region of the surface region. The method includes forming a first gate layer overlying the second region and a second gate layer overlying the third region, while exposing a portion of the first thickness of silicon dioxide. An N-type impurity characteristic is formed within a region within a vicinity underlying the first thickness of silicon dioxide in the first region of the surface region to cause formation of a photo diode device characterized by the N-type impurity region and the P-type substrate.01-21-2010
20100136737METHOD OF MAKING CMOS IMAGE SENSOR-HYBRID SILICIDE - Techniques for manufacturing a CMOS image sensor are provided. A semiconductor substrate is provided, and at least one isolation region can be formed between a periphery region of the substrate and a photo-sensing region of the substrate. A first well in the periphery region and a second well in the photo-sensing region of the substrate are formed. A third well associated with a photodiode is also formed. A gate oxide layer, polysilicon layer, and first metal layer are respectively deposited. The polysilicon layer and first metal layer are etched to form an least one gate in the photo-sensing region and at least one gate in the periphery region. At least two doped regions in the first well are formed, as well as a doped region in the second well. A silicide block layer is deposited over the photo-sensing region of the substrate. A second metal layer is deposited at least over the periphery region after deposition of the silicide block. The substrate is exposed to a thermal environment to form silicide. The second metal layer is removed by etching.06-03-2010
20100197066METHOD OF INTERCONNECT FOR IMAGE SENSOR - A method for fabricating CMOS image sensor device, the method includes providing a semiconductor substrate having a P type impurity characteristic. The semiconductor substrate includes a surface region. The method forms a first dielectric layer having a first thickness overlying a first region of the semiconductor substrate. The method includes providing a N type impurity region in a portion of the semiconductor substrate underneath the first dielectric layer to cause formation of a photodiode device region characterized by at least the N type impurity region and the P type substrate. A second dielectric layer having a second thickness is formed in a second region of the surface region. The second dielectric layer is formed within a portion of the first region within the first thickness of the first dielectric layer. The method forms a polysilicon gate layer overlying at least the second region to form a contact member coupled to the second region.08-05-2010
20100253295SINGLE-PHASE AND THREE-PHASE DUAL BUCK-BOOST/BUCK POWER FACTOR CORRECTION CIRCUITS AND CONTROLLING METHOD THEREOF - The configurations of a single-phase dual buck-boost/buck power factor correction (PFC) circuit and a controlling method thereof are provided in the present invention. The proposed circuit includes a single-phase three-level buck-boost PFC circuit receiving an input voltage and having a first output terminal, a neutral-point and a second output terminal for outputting a first and a second output voltages, a single-phase three-level buck PFC circuit receiving the input voltage and coupled to the first output terminal, the neutral-point and the second output terminal, a first output capacitor coupled to the first output terminal and the neutral-point, a second output capacitor coupled to the neutral-point and the second output terminal, and a neutral line coupled to the neutral-point.10-07-2010
20110187909METHOD AND SYSTEM FOR CMOS IMAGE SENSING DEVICE - Method and system for manufacturing CMOS image sensing device with reduced blooming. The method includes a step for providing a substrate material. The substrate material can be characterized by a first dimension and a second dimension. In addition, the method includes a step for defining an active region on the substrate material. The active region is characterized by a third dimension and a fourth dimension. The method further includes a step for defining a non-active region on the substrate material. The non-active region is different from the active region. The non-active region is characterized by a fifth dimension and a sixth dimension, the non-active region including a silicon material. The method includes a step for defining a depletion region within the active region. In addition, the method includes a step for forming an n-type region positioned above the depletion region.08-04-2011
20110204425METHOD AND DEVICE FOR CMOS IMAGE SENSING WITH MULTIPLE GATE OXIDE THICKNESSES - A method and device for image sensing. The method includes forming a first well and a second well in a substrate, forming a gate oxide layer with at least a first part and a second part on the substrate, and depositing a first gate region and a second gate region on the gate oxide layer. The first part of the gate oxide layer is associated with a first thickness, and the second part of the gate oxide layer is associated with a second thickness. The first thickness and the second thickness are different. The first gate region is located on the first part of the gate oxide layer associated with the first thickness, while the second gate region is located on both the first part of the gate oxide layer associated with the first thickness and the second part of the gate oxide layer associated with the second thickness. The first gate region is associated with the first well, and the second gate region is associated with the second well. Additionally, the method includes forming a third well in the substrate, implanting a first plurality of ions to form a first lightly doped source region and a first lightly doped drain region in the first well, implanting a second plurality of ions to form at least a second lightly doped drain region in the second well, and implanting a third plurality of ions to form a source in the second well.08-25-2011

Patent applications by Jianping Yang, Shanghai CN

Jianping Yang, Phillipsburg, NJ US

Patent application numberDescriptionPublished
20100297607Reagents For HCV Antigen-Antibody Combination Assays - The present invention is directed to combination immunoassays, reagents and kits for simultaneous detection of HCV antigens and anti-HCV antibodies in a sample. The combination immunoassays of the present invention employ a non-ionic detergent that effectively exposes or releases the HCV core antigen from virions in a sample without interfering with the performance of other reagents such as the capture of anti-HCV antibodies by recombinant HCV antigens.11-25-2010

Jianping Yang, Beijing CN

Patent application numberDescriptionPublished
20110292922WIRELESS ROUTER, WIRELESS ROUTING METHOD, AND WIRELESS ROUTING SYSTEM - A wireless router is provided, which includes: a wireless Access Point (AP) module, connected to a terminal equipment through a wireless link, and configured to implement wireless access of the terminal equipment; a station (STA) module, connected to a wireless AP in a fixed network through a wireless link, and configured to connect the terminal equipment to the Internet by using the wireless AP in a fixed network; and a wireless modem module, connected to an access device in a mobile network through a wireless link, and configured to connect the terminal equipment to the Internet by using the access device in a mobile network. According to the technical solutions, a Wireless Local Area Network (WLAN) STA module, an AP module, and a wireless modem chip construct a wireless router to provide not only an AP function but also an STA function. The terminal equipment may be connected to the wireless router, and selects a fixed network hot spot or a wireless modem to access the Internet.12-01-2011

Jianping Zhou, Santa Clara, CA US

Patent application numberDescriptionPublished
20080240603METHODS AND APPARATUS FOR IMAGE ENHANCEMENT - A method and apparatus of enhancing an image, the method comprising applying at least one multi-scale filter bank to at least a portion of an image to detect at least one edge at different scales, and combining the detected edges with said image to yield an enhanced to at least a portion of the image.10-02-2008

Jianping Zhou, Dongyang CN

Patent application numberDescriptionPublished
20100045127SPRING-SHEET-TYPE VIBRATION MOTOR - A spring-sheet-type vibration motor comprises a motor body with an output shaft on a front end and an end cap coupled between a supporting bracket and the motor body on the rear end. The end cap supports one or more electric brushes against the motor body. The supporting bracket includes an end face and a prolonged portion extending therefrom toward the front end of the motor body. One or more connecting terminals are coupled to the supporting bracket, with a first portion coupled to the end face and a front end of a second portion coupled to the prolonged portion. Each terminal further includes a third portion extending obliquely away from the front end of the second portion, a fourth portion bending upward from an end of the third portion, and a contact disposed on a lower surface of a connecting area of the third portion and the fourth portion.02-25-2010

Jianping Zhu, Beijing CN

Patent application numberDescriptionPublished
20090109434Cylindrical Model Eye, Cylindrical Test Device And The Manufacturing Method Thereof - A cylindrical model eye comprises a plano-cylindrical portion having a plano surface and a first cylindrical surface opposite to the plano surface, a sphero-cylindrical portion having a convex spherical surface and a second cylindrical surface opposite to the convex spherical surface. The second cylindrical surface mates with the first cylindrical surface, and the first cylindrical surface has substantially the same radius curvature radius as the second cylindrical surface.04-30-2009