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Jian, US
Bing Jian, Exton, PA US
| Patent application number | Description | Published |
|---|---|---|
| 20090238428 | Efficient Estimator Of Pharmacokinetic Parameters in Breast MRI - A method for performing pharmacokinetic analysis in magnetic resonance (MR) images includes administering a dose of contrast agent (CA) into a subject. A sequence of medical images is acquired of the subject at set temporal intervals. The time-based behavior of concentrations of CA is described within the subject for each voxel of each medical image of the sequence of medical images based on a reference voxel using a compartmental model for pharmacokinetic analysis that is based on a set of compartmental model parameters. The compartmental model is solved for each of the compartmental model parameters. The solution for the compartmental model parameters is used to estimate one or more parameters of physiological significance. | 09-24-2009 |
| 20090262999 | Efficient Features for Computer-Aided Detection - Described herein is a technology for facilitating computer-aided detection (CAD). In one implementation, the CAD technology includes receiving an enhancement pattern ( | 10-22-2009 |
| 20090263000 | Iterative Segmentation of Images for Computer-Aided Detection - Described herein is a method and system for facilitating computer-aided detection (CAD). In one implementation, image data is received ( | 10-22-2009 |
| 20100061609 | Quotient Appearance Manifold Mapping For Image Classification - Described herein is a technology for facilitating classification of an object. In one implementation, at least one quotient appearance manifold mapping is constructed from a sample image to untangle appearance fiber bundles. A feature characteristic of the sample image may then be extracted based on the quotient appearance manifold mapping. A classifier may further be trained based on the extracted feature, and adapted for associating the object with an object class. | 03-11-2010 |
Bo Xin Jian US
| Patent application number | Description | Published |
|---|---|---|
| 20120097568 | AIR ENCLOSURE WITH SIDE CUSHIONING FUNCTION - An air enclosure is provided. An air filling passageway for filling air into the first and second air cylinders is formed between two inner films. A plurality of first air cylinders and at least one second air cylinder are formed between two outer films. The second air cylinder includes an upper section, a middle section, and a lower section. The upper section, middle section, and lower section are isolated from each other. At least one tiny tube, connected with the upper and lower section is disposed at the middle section. The air is filled into the first air cylinders, as well as the upper section and the lower section, while the middle section remains flat. Because second air cylinder includes expanded upper section, lower section, and flat middle section, an accepting space with different shapes can be formed. | 04-26-2012 |
Chen Jian, Menlo Park, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20100318839 | DATA RECOVERY IN MULTI-LEVEL CELL NONVOLATILE MEMORY - In a nonvolatile memory array, data is stored in multi-level cells (MLC) as upper-page data and lower-page data. Safe copies of both upper-page and lower-page data are stored in on-chip cache during programming. If a write fail occurs, data is recovered from on-chip cache. The controller does not have to maintain safe copies of data. | 12-16-2010 |
Heng-Yu Jian, Los Angeles, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090023413 | Cross Coupled High Frequency Buffer - A local oscillator (LO) buffer circuit comprises first and second LO buffers arranged in a cross coupled configuration. The first LO buffer generates in-phase output signals in response to in-phase input signals, and quadrature output signals from the second LO buffer. The second LO buffer generates the quadrature output signals in response to quadrature input signals and the in-phase output signals. The LO buffers may include inductive loads. The LO buffers may include MOS transistors or bipolar junction transistors. | 01-22-2009 |
| 20090091396 | METHOD AND SYSTEM FOR CALIBRATION OF A TANK CIRCUIT IN A PHASE LOCK LOOP - A phase lock loop includes a calibration loop for calibrating a tank circuit for capacitance variation through process variations of manufacturing an integrated circuit including the phase lock loop. A capacitance profile for setting the frequency of the phase lock loop at a process corner, such as a typical process corner is stored in driver software or a host processor. At power up, or after an idle time, a calibration is performed at two frequencies. The capacitances of operating the phase lock loop at the two frequencies are determined and stored. During a frequency change, the capacitance of operating the phase lock loop is determined from the capacitance profile and stored capacitances. In one aspect, the capacitance of the phase lock loop is presumed to change linearly with frequency and the two stored capacitances are used to determine a difference capacitance at the selected frequency by linear interpolating between the two stored capacitances. The interpolated difference capacitance is added to the capacitance in the capacitance profile at the selected frequency to generate an operating capacitance. The capacitance of a tank circuit of the phase lock loop is set to the operating capacitance. | 04-09-2009 |
Heng-Yu Jian, San Diego, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20120007643 | Binary-Weighted Delta-Sigma Fractional-N Frequency Synthesizer With Digital-To-Analog Differentiators Canceling Quantization Noise - A phase lock loop includes a quantization circuit that generators an out of phase noise cancellation signal from an error in a delta-sigma modulator and applies the noise cancellation signal to the charge pump. The quantization circuit includes a digital-to-analog differentiator. The digital-to-analog differentiator may be, for example, a single-bit first-order digital-to-analog differentiator, a single-bit second-order digital-to-analog differentiator, or a full M-bit binary-weighted digital to analog differentiator. | 01-12-2012 |
Mou Jian, Knoxville, TN US
| Patent application number | Description | Published |
|---|---|---|
| 20100061906 | METHOD AND A DEVICE FOR REMOVING NITROGEN OXIDES AND SULPHUR TRIOXIDE FROM A PROCESS GAS - A catalytic reactor ( | 03-11-2010 |
Ping Jian, San Jose, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20080280438 | METHODS FOR DEPOSITING TUNGSTEN LAYERS EMPLOYING ATOMIC LAYER DEPOSITION TECHNIQUES - In one embodiment of the invention, a method for forming a tungsten-containing layer on a substrate is provided which includes positioning a substrate containing a barrier layer disposed thereon in a process chamber, exposing the substrate to a first soak process for a first time period and depositing a nucleation layer on the barrier layer by flowing a tungsten-containing precursor and a reductant into the process chamber. The method further includes exposing the nucleation layer to a second soak process for a second time period and depositing a bulk layer on the nucleation layer. In one example, the barrier layer contains titanium nitride, the first and second soak processes independently comprise at least one reducing gas selected from the group consisting of hydrogen, silane, disilane, dichlorosilane, borane, diborane, derivatives thereof and combinations thereof and the nucleation layer may be deposited by an atomic layer deposition process or a pulsed chemical vapor deposition process while the bulk layer may be deposited by a chemical vapor deposition process or a physical vapor deposition process. | 11-13-2008 |
| 20080317954 | PULSED DEPOSITION PROCESS FOR TUNGSTEN NUCLEATION - In one embodiment, a method for depositing a tungsten material on a substrate within a process chamber is provided which includes exposing the substrate to a gaseous mixture containing a tungsten precursor and a reducing gas to deposit a tungsten nucleation layer on the substrate during a tungsten deposition process. The process further includes removing reaction by-products generated during the tungsten deposition process from the process chamber, exposing the substrate to the reducing gas to react with residual tungsten precursor within the process chamber during a soak process, removing reaction by-products generated during the soak process from the process chamber, and repeating the tungsten deposition process and the soak process during a cyclic deposition process. In the examples, the reducing gas may contain diborane or silane. | 12-25-2008 |
Xiaogang Jian, Knoxville, TN US
| Patent application number | Description | Published |
|---|---|---|
| 20090126897 | METHOD AND APPARATUS FOR SEMI-SOLID MATERIAL PROCESSING - A method of forming a material includes the steps of: vibrating a molten material at an ultrasonic frequency while cooling the material to a semi-solid state to form non-dendritic grains therein; forming the semi-solid material into a desired shape; and cooling the material to a solid state. The method makes semi-solid castings directly from molten materials (usually a metal), produces grain size usually in the range of smaller than 50 μm, and can be easily retrofitted into existing conventional forming machine. | 05-21-2009 |
Yongxi Jian US
| Patent application number | Description | Published |
|---|---|---|
| 20110280761 | AMORPHOUS ALLOYS HAVING ZIRCONIUM AND METHODS THEREOF - Alloys and methods of preparing the same are provided. The alloys are represented by the general formula of (Zr | 11-17-2011 |