Patent application number | Description | Published |
20110231467 | MONTGOMERY MULTIPLIER HAVING EFFICIENT HARDWARE STRUCTURE - A radix-2k Montgomery multiplier including an input coefficient generation unit to receive a multiplier, a multiplicand, a modulus, a sum and a previous sum, to generate and to output a partial product and a multiple modulus by using at least one of the multiplier, the multiplicand, the modulus and the sum, and to divide and to output the received previous sum into units of k bits, an accumulator circuit to receive the partial product, the multiple modulus and k bits of the previous sum from the input coefficient generation unit, and to generate and to output a carry and a sum by summing the partial product, the multiple modulus and the previous sum, and a carry propagation adder (CPA) circuit to generate and to output an ultimate sum by using the carry and the sum. | 09-22-2011 |
20120096062 | MODULAR CALCULATOR, OPERATION METHOD OF THE MODULAR CALCULATOR, AND APPARATUSES HAVING THE SAME - A modular calculator and a method of performing a modular calculation are provided. The modular calculator includes a first register to receive and to store a first integer, a second register to receive and to store a second integer, a calculator connected to an output terminal of the first register and an output terminal of the second register, and a controller to determine an arithmetic operation of the calculator by referring to a sign of the first integer and a sign of the second integer and to control the calculator to perform the determined arithmetic operation on one of an addition and a subtraction of the first integer and the second integer and a modulus value. | 04-19-2012 |
20120197953 | MONTGOMERY INVERSE CALCULATION DEVICE AND METHOD OF CALCULATING MONTGOMERY INVERSE USING THE SAME - A Montgomery inverse calculation device includes a plurality of registers each storing a value of a variable, a modulus register storing a modulus, a multiplier performing multiplication on the modulus. A comparator compares the value of the variable stored in each of the registers with an output value of the multiplier and generates a plurality of control signals. A plurality of shifters shifts bits of a value of a variable stored in a corresponding register among the registers in response to at least one first control signal, and a quotient generation block calculates a quotient of mod 2m with respect to values output from some of the shifters in response to a second control signal. A calculation block calculates an updated value of an output value of each of the shifters using the quotient in response to at least one third control signal. | 08-02-2012 |
20120317159 | MODULAR OPERATOR, DEVICE HAVING THE SAME, AND OPERATING METHOD THEREOF - A modular operator, a smart card including the same, and a method of operating the same are provided. The modular operator includes: an input unit configured to receive first data, second data, and a modulus; and an accumulator configured to perform an accumulation operation on the first data and a first portion of the second data, to shift the accumulation operation result to the right as much as the number of bits of the first portion, and to perform an accumulation operation on a result of a shifted accumulation operation, a second part, of the second data, which is shifted to the right as much as the number of bits of the first portion, and the modulus. | 12-13-2012 |
20130262544 | ELECTRONIC MULTIPLIER AND DIGITAL SIGNAL PROCESSOR INCLUDING THE SAME - An electronic multiplier, such as a multiplication circuit, may include a partial product generator, a Booth code encoder and an accumulator. The partial product generator may generate partial product data based on a Booth code and multiplicand data. The Booth code encoder may generate the Booth code based on multiplier data. The Booth code may include a zero-generation Booth code and a zero-avoidance Booth code. The Booth code encoder may selectively generate the zero-generation Booth code or the zero-avoidance Booth code when the partial product data correspond to a partial product of zero. The accumulator accumulates the partial product data to provide a multiplication result of the multiplicand data and the multiplier data. | 10-03-2013 |
20130311531 | MODULAR ARITHMATIC UNIT AND SECURE SYSTEM INCLUDING THE SAME - A modular arithmetic unit includes a first input generator receiving first data to generate a first operand; a second input generator receiving second data to generate a second operand; an accumulator performing an accumulate/shift operation to add the first and second operands and outputting the carry and sum; a carry propagation adder adding the carry and the sum to output a result; and a data handler receiving either external data or the result and outputting the first data and the second data. | 11-21-2013 |
20130311533 | MODULAR MULTIPLIER AND MODULAR MULTIPLICATION METHOD THEREOF - A modular multiplier and a modular multiplication method are provided. The modular multiplier includes: a first register which stores a previous accumulation value calculated at a previous cycle; a second register which stores a previous quotient calculated at the previous cycle; a quotient generator which generates a quotient using the stored previous accumulation value output from the first register; and an accumulator which receives an operand, a bit value of a multiplier, the stored previous accumulation value, and the stored previous quotient to calculate an accumulation value in a current cycle, wherein the calculated accumulation value is updated to the first register, and the generated quotient is updated to the second register. | 11-21-2013 |
20140192977 | MUTIPLICATION METHOD AND MODULAR MULTIPLIER USING REDUNDANT FORM RECODING - A multiplication method and a modular multiplier are provided. The multiplication method includes transforming a redundant-form multiplier by adding a recoding constant to the multiplier, performing recoding by using the transformed multiplier, and performing partial multiplication between the multiplier and a multiplicand using result values of the recoding. | 07-10-2014 |
20140264572 | METHODS OF FORMING SEMICONDUCTOR DEVICES USING HARD MASK LAYERS - A method of forming a semiconductor structure can include forming a photolithography mask on a silicon fin having a hard mask layer thereon extending in a first direction. A trench can be formed through the hard mask layer into the silicon fin using the photolithography mask, where the trench extends in a second direction to separate the silicon fin into first and second fin structures extending end-to-end in the first direction. A portion of the trench formed by the hard mask layer can be widened relative to a lower portion of the trench defined by the first and second fin structures. | 09-18-2014 |
20140357061 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - Provided are a semiconductor device and a method for fabricating the same. The method for fabricating a semiconductor device comprises, providing an active fin and a field insulating film including a first trench disposed on the active fin; forming a second trench through performing first etching of the field insulating film that is disposed on side walls and a lower portion of the first trench; forming a first region and a second region in the field insulating film through performing second etching of the field insulating film that is disposed on side walls and a lower portion of the second trench, the first region is disposed adjacent to the active fin and has a first thickness, and the second region is disposed spaced apart from the active fin as compared with the first region and has a second thickness that is thicker than the first thickness; and forming a gate structure on the active fin and the field insulating film. | 12-04-2014 |