Patent application number | Description | Published |
20080258951 | Hybrid Delta-Sigma/SAR Analog to Digital Converter and Methods for Using Such - Various systems and methods for capturing data are disclosed. For example, some embodiments of the present invention provide methods for performing a first analog to digital conversion using a delta-sigma based analog to digital converter, and performing a second analog to digital conversion using a SAR based analog to digital converter. The delta-sigma converter provides a first portion of a conversion result, and the SAR based analog to digital converter provides a second portion of the conversion result. The methods further include combining the first portion of the conversion result with the second portion of the conversion result to produce a combined conversion result. | 10-23-2008 |
20080258959 | Integrating/SAR ADC and method with low integrator swing and low complexity - A reconfigurable circuit ( | 10-23-2008 |
20080259989 | Systems and Methods for Temperature Measurement Using N-Factor Coefficient Correction - Various systems and methods for temperature measurement are disclosed. For example, some embodiments of the present invention provide temperature measurement systems. Such temperature measurement systems include a variable current source and a diode connected transistor. The variable current source is capable of applying two or more distinct currents to the diode connected transistor. The currents result in a different base-emitter voltage on the diode connected transistor. The systems further include an n-factor coefficient register and an analog to digital converter. The analog to digital converter is operable to receive two of the base-emitter voltages created by applying the different currents, and to provide a digital output based at least in part on a value stored in the n-factor coefficient register and the two base-emitter voltages. | 10-23-2008 |
20080259997 | Systems and Methods for PWM Clocking in a Temperature Measurement Circuit - Various systems and methods for pulse width modulated clocking in a temperature measurement are disclosed. For example, some embodiments of the present invention provide temperature measurement systems with a variable current source, a transistor, and a pulse width modulation circuit. The variable current source is operable to provide a first current and a second current that are applied to the transistor. A first base-emitter voltage occurs on the transistor when the first current is applied, and a second base-emitter voltage occurs on the transistor when the second current is applied. The first base emitter voltage is associated with a first sample period, and a second base-emitter voltage is associated with a second sample period. The pulse width modulation circuit provides a pulse width modulated clock including a combination of the aforementioned first period and second period. | 10-23-2008 |
20080288662 | Identification address configuration circuit and method without use of dedicated address pins - An identification address of a sensor interface device is configured in response to the order of connection of first (DXP | 11-20-2008 |
20090009239 | Low glitch offset correction circuit for auto-zero sensor amplifiers and method - An instrumentation amplifier includes first ( | 01-08-2009 |
20090073011 | CIRCUIT AND METHOD FOR GAIN ERROR CORRECTION IN ADC - Gain errors are corrected in an ADC chip including an integrator ( | 03-19-2009 |
20100019842 | Low-noise, wide offset range, programmable input offset amplifier front end and method - A programmable offset amplifier includes first (M | 01-28-2010 |
20100329304 | Circuit and method for beta variation compensation in single-transistor temperature sensor - A circuit ( | 12-30-2010 |
20110260708 | Bandgap reference circuit and method - A circuit for generating a band gap reference voltage (V | 10-27-2011 |
20120025890 | Circuitry and method for preventing base-emitter junction reverse bias in comparator differential input transistor pair - A differential input circuit ( | 02-02-2012 |
20120025891 | Bipolar transistor anti-saturation clamp using auxiliary bipolar stage, and method - An output stage ( | 02-02-2012 |
20130100066 | MULTI-TOUCH CAPABLE SINGLE LAYER CAPACITIVE TOUCH PANEL - An apparatus is provided, which has a touch panel, an interconnect, and a touch panel controller. The touch panel has a plurality of sensors arranged in a plurality of rows and columns. Each row has a row electrode that extends across a portion of the touch screen and that is coupled to a row pad located along the periphery of the touch panel through a routing network, and each column has a plurality of column electrodes that are interleaved with at least one of the row electrodes and that are each coupled to a column pad located along the periphery of the touch panel through the routing network. The interconnect is secured to the touch panel and is coupled to each column pad and each row pad. The touch screen controller has an interface that is coupled to the interconnect and a control circuit that is coupled to the interface. | 04-25-2013 |
20140022200 | CAPACITIVE TOUCH PANEL HAVING IMPROVED RESPONSE CHARACTERISTICS - An apparatus is provided. The apparatus comprises a second layer disposed over a first layer. Each of the first and second layers have a set of detection electrodes that are spaced apart and electrically isolated from one another and an associated set of interleavers. Each interleaver is located between adjacent detection electrodes from its associated the set of detection electrodes, and each set of interleavers also includes a pair of complementary interleaving electrodes coupled to those that are electrically coupled to the adjacent detection electrodes from its associated set of detection electrodes. The detection electrodes and interleaving electrodes are also substantially transparent to visible spectrum light. | 01-23-2014 |