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Jeremy Segar, Wheatley GB
Jeremy Segar, Wheatley GB
| Patent application number | Description | Published |
|---|---|---|
| 20100225390 | Resource Efficient Adaptive Digital Pre-Distortion System - A digital pre-distortion system which can provide the flexibility to model the highly non-linear distortion associated with High Efficiency RF Power Amplifiers while through a novel implementation of a least squares estimation process allows an implementation well suited for an FPGA application where limited resources and in particular memory resources are available. | 09-09-2010 |
| 20100244953 | CDMA/OFDM Compliant Wireless Communication from a Non-Linear Finite Impulse Response Filter Configured with Coefficients that are Responsive to an Input Signal Magnitude - A digital pre-distortion system which can provide the flexibility to model the highly non-linear distortion associated with High Efficiency RF Power Amplifiers while through a novel implementation of a least squares estimation process allows an implementation well suited for an FPGA application where limited resources and in particular memory resources are available. | 09-30-2010 |
| 20100244954 | CDMA/OFDM Linearity Compliant Wireless Communication Amplifier - A digital pre-distortion system which can provide the flexibility to model the highly non-linear distortion associated with High Efficiency RF Power Amplifiers while through a novel implementation of a least squares estimation process allows an implementation well suited for an FPGA application where limited resources and in particular memory resources are available. | 09-30-2010 |
| 20100289574 | Signal Pre-Distortion Facility for Amplifier Non-Linearity Compensation - A digital pre-distortion system which can provide the flexibility to model the highly non-linear distortion associated with High Efficiency RF Power Amplifiers while through a novel implementation of a least squares estimation process allows an implementation well suited for an FPGA application where limited resources and in particular memory resources are available. | 11-18-2010 |
| 20100289575 | Increasing the Density of Larger Magnitude Amplifier Output Samples for Estimating a Model of Digital Pre-Distortion to Compensate for Amplifier Non-Linearity - A digital pre-distortion system which can provide the flexibility to model the highly non-linear distortion associated with High Efficiency RF Power Amplifiers while through a novel implementation of a least squares estimation process allows an implementation well suited for an FPGA application where limited resources and in particular memory resources are available. | 11-18-2010 |
| 20110109384 | Wireless Signal Corrective Pre-Distortion using Linearly Interpolated Filter Coefficients Derived from an Amplifier Sample Set that is Representative of Amplifier Nonlinearlity - A digital pre-distortion system which can provide the flexibility to model the highly non-linear distortion associated with High Efficiency RF Power Amplifiers while through a novel implementation of a least squares estimation process allows an implementation well suited for an FPGA application where limited resources and in particular memory resources are available. | 05-12-2011 |
| 20110109385 | Digital Compensation for Parasitic Distortion Resulting from Direct Baseband to RF Modulation - A digital pre-distortion system which can provide the flexibility to model the highly non-linear distortion associated with High Efficiency RF Power Amplifiers while through a novel implementation of a least squares estimation process allows an implementation well suited for an FPGA application where limited resources and in particular memory resources are available. | 05-12-2011 |
| 20110163805 | Time - Alignment of Two Signals Used for Digital Pre-Distortion - A digital pre-distortion system which can provide the flexibility to model the highly non-linear distortion associated with High Efficiency RF Power Amplifiers while through a novel implementation of a least squares estimation process allows an implementation well suited for an FPGA application where limited resources and in particular memory resources are available. | 07-07-2011 |