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| 20090154868 | SEMICONDUCTOR OPTO-ELECTRONIC INTEGRATED CIRCUITS AND METHODS OF FORMING THE SAME - Provided are semiconductor opto-electronic integrated circuits and methods of forming the same. The semiconductor opto-electronic integrated circuit includes: an optical waveguide disposed on a substrate and including an input terminal and an output terminal; an optical grating formed on the optical waveguide; and an optical active device disposed on the optical grating and receiving an optical signal from the optical waveguide through the optical grating to modulate the optical signal. | 06-18-2009 |
| 20100142878 | ABSORPTION MODULATOR AND MANUFACTURING METHOD THEREOF - An absorption modulator is provided. The absorption modulator includes a substrate, an insulation layer disposed on the substrate, and a waveguide having a P-I-N diode structure on the insulation layer. Absorptance of an intrinsic region in the P-I-N diode structure is varied when modulating light inputted to the waveguide. The absorption modulator obtains the improved characteristics, such as high speed, low power consumption, and small size, because it greatly reduces the cross-sectional area of the P-I-N diode structure. | 06-10-2010 |
| 20100278477 | SEMICONDUCTOR INTEGRATED CIRCUITS INCLUDING OPTOELECTRONIC DEVICE FOR CHANGING OPTICAL PHASE - Provided is a semiconductor integrated circuit. The semiconductor integrated circuit includes a semiconductor pattern disposed on a substrate and including an optical waveguide part and a pair of recessed portions. The optical waveguide part has a thickness ranging from about 0.05 m to about 0.5 μm. The recessed portions are disposed on both sides of the optical waveguide part and have a thinner thickness than the optical waveguide part. A first doped region and a second doped region are disposed in the recessed portions, respectively. The first and second doped regions are doped with a first conductive type dopant and a second conductive type dopant, respectively. An intrinsic region is formed in at least the optical waveguide part to contact the first and second doped regions. | 11-04-2010 |
| 20110051222 | ELECTRO-OPTIC DEVICE - An electro-optic device is provided. The electro-optic device includes a junction layer disposed between a first conductivity type semiconductor layer and a second conductivity type semiconductor layer to which a reverse vias voltage is applied. The first conductivity type semiconductor layer and the second conductivity type semiconductor layer have an about 2 to 4-time doping concentration difference therebetween, thus making it possible to provide the electro-optic device optimized for high speed, low power consumption and high integration. | 03-03-2011 |
| 20110058764 | ELECTRO-OPTIC MODULATING DEVICE - Provided is an electro-optic modulating device. The electro-optic modulating device includes an optical waveguide with a vertical structure and sidewalls of the vertical structure are used to configure a junction. | 03-10-2011 |
| 20110109955 | ELECTRO-OPTIC DEVICE - Provided is an electro-optic device. Sine the electro-optic device includes a plurality of first conductive type semiconductor layers and a plurality of depletion layers formed by a third semiconductor disposed between the plurality of first conductive type semiconductor layers, an electro-optic device optimized for a high speed and low power consumption can be provided. | 05-12-2011 |
| 20110135243 | ELECTRO-OPTIC DEVICE - Provided is an electro-optic device. The electro-optic device includes an input Y-branch comprising a first input branch and a second input branch, an output Y-branch comprising a first output branch and a second output branch, a first optical modulator and a second optical modulator connected in series between the first input branch and the first output branch, and a third optical modulator connecting the second input branch to the second output branch. The first optical modulator comprises a PIN diode, and each of the second optical modulator and the third optical modulator comprises a PN diode. | 06-09-2011 |
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| 20080251494 | Method for manufacturing circuit board - A method of manufacturing a circuit board is disclosed. The method may include: forming a relievo pattern, which is in a corresponding relationship with a circuit pattern, on a metal layer that is stacked on a carrier; stacking and pressing the carrier onto an insulation layer with the relievo pattern facing the insulation layer; transcribing the metal layer and the relievo pattern into the insulation layer by removing the carrier; forming a via hole in the insulation layer on which the metal layer is transcribed; and filling the via hole and forming a plating layer over the metal layer by performing plating over the insulation layer on which the metal layer is transcribed. As the relievo pattern may be formed on the metal layer stacked on the carrier, and the relievo pattern may be transcribed into the insulation layer, high-density circuit patterns can be formed. | 10-16-2008 |
| 20080264676 | Circuit board and method for manufaturing thereof - A method of manufacturing a circuit board that includes: forming a conductive relievo pattern, including a first plating layer, a first metal layer, and a second plating layer stacked sequentially in correspondence with a first circuit pattern, on a seed layer stacked on a carrier; stacking and pressing together the carrier and an insulator, such that a surface of the carrier having the conductive relievo pattern faces the insulator; transcribing the conductive relievo pattern into the insulator by removing the carrier; forming a conduction pattern, including a third plating layer and a second metal layer stacked sequentially in correspondence with a second circuit pattern, on the surface of the insulator having the conductive relievo pattern transcribed; removing the first plating layer and seed layer; and removing the first and second metal layers, can provide a circuit board that has high-density circuit patterns without an increased amount of insulator. | 10-30-2008 |
| 20090011220 | Carrier and method for manufacturing printed circuit board - A carrier and a method for manufacturing a printed circuit board are disclosed. The method for manufacturing a printed circuit board may include: forming a first circuit pattern on each of a pair of release layers, which are attached respectively to either side of a base layer by adhesive layers; detaching the pair of release layers from the base layer; stacking and pressing the pair of release layers onto either side of an insulation substrate such that the first circuit patterns are buried in the insulation substrate; and separating the pair of release layers. By forming a circuit pattern on each of a pair of release layers with a single process, and transferring the circuit pattern into each side of an insulation substrate, the manufacturing process can be shortened and circuit patterns can be formed to a high density. | 01-08-2009 |
| 20090140429 | Metal interconnection of a semiconductor device and method of manufacturing the same - A method of manufacturing a metal interconnection of a semiconductor device includes forming a base layer with at least one groove, the at least one groove having an open upper portion, forming a first metal layer in the at least one groove, forming a seed metal layer on the first metal layer in the at least one groove, the seed metal layer being only on a bottom surface of the at least one groove, and forming a metal pattern grown from the seed metal layer to fill the at least one grove. | 06-04-2009 |
| 20100013094 | SEMICONDUCTOR PACKAGE AND METHODS OF MANUFACTURING THE SAME - A semiconductor package and a method of manufacturing the semiconductor package. The semiconductor package include a substrate including a plurality of pads and a plurality of bumps evenly disposed on an entire region of the substrate regardless of an arrangement of the plurality of pads. According to the present invention, a simplification of a process can be accomplished, a cost of a process can be reduced, reliability can be improved and an under-filling can become easy. | 01-21-2010 |
| 20100018633 | METHOD OF MANUFACTURING PRINTED CIRCUIT BOARD - Disclosed is a method of manufacturing a printed circuit board. The method of manufacturing a printed circuit board having a via for connecting one layer to another layer can include forming a circuit pattern on one surface of a carrier; processing a hole corresponding to the via on one surface of the carrier; compressing the surface of the carrier into one surface of an insulation body; removing the carrier; processing a via hole on the insulation body, corresponding to a position of the hole; and forming a conductive material in the via hole, to thereby easily process a hole for forming a via and have high design freedom | 01-28-2010 |
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| 20090207472 | OPTICAL DEVICE INCLUDING GATE INSULATING LAYER HAVING EDGE EFFECT - Provided is an optical device having an edge effect with improved phase shift and propagation loss of light without decreasing the dynamic characteristics of the optical device. The optical device includes a first semiconductor layer which is doped with a first type of conductive impurities, and has a recessed groove in an upper portion thereof; a gate insulating layer covering the groove and a portion of the first semiconductor layer; and a second semiconductor layer which covers an upper surface of the gate insulating layer and is doped with a second type of conductive impurities opposite to the first type of conductive impurities. | 08-20-2009 |
| 20090237770 | OPTICAL DEVICE INCLUDING GATE INSULATOR WITH MODULATED THICKNESS - Provided is an optical device with improved phase shift and propagation loss of light without decreasing the dynamic characteristics of the optical device. The optical device includes a first semiconductor layer which is doped with a first type of conductive impurities and has a uniform thickness; a gate insulating layer which has a ? shape and is formed on a portion of the first semiconductor layer and has a thin center portion; and a second semiconductor layer which covers an upper surface of the gate insulating layer and is doped with a second type of conductive impurities opposite to the first type of conductive type impurities. | 09-24-2009 |
| 20090261383 | OPTICAL DEVICE HAVING STRAINED BURIED CHANNEL - Provided is an optical device having a strained buried channel area. The optical device includes: a semiconductor substrate of a first conductive type; a gate insulating layer formed on the semiconductor substrate; a gate of a second conductive type opposite to the first conductive type, formed on the gate insulating layer; a high density dopant diffusion area formed in the semiconductor substrate under the gate and doped with a first conductive type dopant having a higher density than the semiconductor substrate; a strained buried channel area formed of a semiconductor material having a different lattice parameter from a material of which the semiconductor substrate is formed and extending between the gate insulating layer and the semiconductor substrate to contact the high density dopant diffusion area; and a semiconductor cap layer formed between the gate insulating layer and the strained buried channel area. | 10-22-2009 |
| 20100002978 | PHOTOELECTRIC DEVICE USING PN DIODE AND SILICON INTEGRATED CIRCUIT (IC) INCLUDING THE PHOTOELECTRIC DEVICE - Provided are a photoelectric device using a PN diode and a silicon integrated circuit (IC) including the photoelectric device. The photoelectric device includes: a substrate; and an optical waveguide formed as a PN diode on the substrate, wherein a junction interface of the PN diode is formed in a direction in which light advances; and an electrode applying a reverse voltage to the PN diode, wherein N-type and P-type semiconductors of the PN diode are doped at high concentrations and the doping concentration of the N-type semiconductor is higher than or equal to that of the P-type semiconductor. | 01-07-2010 |
