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Jeong-O

Jeong-O Ha, Asan-Si KR

Jeong-O Ha, Chungcheongnam-Do KR

Patent application numberDescriptionPublished
20080211078SEMICONDUCTOR PACKAGES AND METHOD OF MANUFACTURING THE SAME - A stacked semiconductor package can be formed according to principles of the present invention by stacking a plurality of semiconductor packages. A method of manufacturing the stacked semiconductor packages provides a simple manufacturing process. The stacked semiconductor package embodying these principles preferably includes a base substrate, one or more lower semiconductor packages, one or more upper semiconductor packages, and an external sealing agent. Each lower semiconductor package can include a first inner substrate, one or more first semiconductor chips electrically connected to and mounted on the first inner substrate, a first inner sealing agent sealing the first semiconductor chips, and a first contact portion. Each lower semiconductor package is preferably mounted on a portion of an upper surface of the base substrate and is electrically connected to the base substrate via the first contact portion. Each upper semiconductor package can include a second inner substrate, one or more second semiconductor chips electrically connected to and mounted on the second inner substrate, a second inner sealing agent sealing the second semiconductor chips, and a second contact portion which preferably does not contact the lower semiconductor package. Each upper semiconductor package is preferably mounted on and electrically connected to an upper surface of the base substrate via the second contact portion. One or more of the upper semiconductor packages can cover one or more of the lower semiconductor packages. The external sealing agent can cover the upper surface of the base substrate and seal the lower semiconductor package and the upper semiconductor package. A third contact portion can be formed on a lower surface of the base substrate to electrically connect the base substrate to the outside. Use of stacked semiconductor packages constructed according to these principles leads to low defect rates and high mechanical stability.09-04-2008

Jeong-O Lee, Daejun KR

Patent application numberDescriptionPublished
20100044679Method For Producing Carbon Nanotube Transistor And Carbon Nanotube Transistor Thereby - The present invention relates to a method of manufacturing a carbon nanotube transistor in which a carbon nanotube channel is formed between a source electrode and a drain electrode and a gate electrode is formed at one side of the carbon nanotube channel, the method comprising the steps of: (a) forming the carbon nanotube channel on a substrate; (b) electrically connecting the source electrode and the drain electrode to both ends of the carbon nanotube channel, respectively; and (c) applying a stress voltage across the source electrode and the drain electrode to remove metallicity of the carbon nanotube channel.02-25-2010