| Patent application number | Description | Published |
|---|
| 20080314868 | METHODS OF FORMING SEMICONDUCTOR DEVICES FORMED BY PROCESSES INCLUDING THE USE OF SPECIFIC ETCHANT SOLUTIONS - The present invention provides etchant solutions including deionized water and an organic acid having a carboxyl radical and a hydroxyl radical. Methods of forming magnetic memory devices are also disclosed. | 12-25-2008 |
| 20090280641 | METHOD OF FORMING A CONTACT STRUCTURE - An insulation layer may be formed on an object having a contact region. The insulation layer may be partially etched to form an opening exposing the contact region. A material layer including silicon and oxygen may be formed on the exposed contact region. A metal layer may be formed on the material layer including silicon and oxygen. The material layer including silicon and oxygen may be reacted with the metal layer to form a metal oxide silicide layer at least on the contact region. A conductive layer may be formed on the metal oxide silicide layer to fill up the opening. | 11-12-2009 |
| 20100035436 | Composition for etching silicon oxide layer, method for etching semiconductor device using the same, and composition for etching semiconductor device - A composition for etching a silicon oxide layer, a method of etching a semiconductor device, and a composition for etching a semiconductor device including a silicon oxide layer and a nitride layer including hydrogen fluoride, an anionic polymer, and deionized water, wherein the anionic polymer is included in an amount of about 0.001 to about 2 wt % based on the total weight of the composition for etching a silicon oxide layer, and an etch selectivity of the silicon oxide layer with respect to a nitride layer is about 80 or greater. | 02-11-2010 |
| 20100187654 | Semiconductor device having capacitor and method of fabricating the same - A semiconductor device having a capacitor and a method of fabricating the same may be provided. A method of fabricating a semiconductor device may include forming an etch stop layer and a mold layer sequentially on a substrate, patterning the mold layer to form a mold electrode hole exposing a portion of the etch stop layer, etching selectively the exposed etch stop layer by an isotropic dry etching process to form a contact electrode hole through the etch stop layer to expose a portion of the substrate, forming a conductive layer on the substrate and removing the conductive layer on the mold layer on the mold layer to form a cylindrical bottom electrode in the mold and contact electrode holes. The isotropic dry etching process may utilize a process gas including main etching gas and selectivity adjusting gas. The selectivity adjusting gas may increase an etch rate of the etch stop layer by more than an etch rate of the mold layer by the isotropic wet etching process. | 07-29-2010 |
| 20100267225 | Method of manufacturing semiconductor device - A method of manufacturing a semiconductor device, the method including forming a photoresist film on a substrate, and removing the photoresist film from the substrate using a composition that includes a sulfuric acid solution, a hydrogen peroxide solution, and a corrosion inhibitor. | 10-21-2010 |
| 20110083807 | Apparatus for Treating Wafers Using Supercritical Fluid - Provided are an apparatus and method for treating wafers using a supercritical fluid. The wafer treatment apparatus includes a plurality of chambers; a first supply supplying a first fluid in a supercritical state; a second supply supplying a mixture of the first fluid and a second fluid; a plurality of first and second valves; and a controller selecting a first chamber of the plurality of chambers for wafer treatment to control the open/closed state of each of the plurality of first valves so that the first fluid can be supplied only to the first chamber of the plurality of chambers and selecting a second chamber of the plurality of chambers to control the open/closed state of each of the plurality of second valves so that the mixture of the first fluid and a second fluid can be supplied only to the second chamber of the plurality of chambers. The wafer treatment method involves performing a predetermined treatment such as etching, cleaning or drying on wafers within only one of the plurality of chambers, followed by wafer treatment on the succeeding chamber, and thus allowing for sequential wafer treatment within each of the plurality of chambers. | 04-14-2011 |
| Patent application number | Description | Published |
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| 20080231164 | Flat display panel and method of driving the same - A flat display panel in which a field emission principle of ferroelectrics is applied to improve the luminous efficiency with a low driving voltage, and a method of driving the same. The flat display panel includes a first substrate and a second substrate which face each other, barrier ribs which are disposed between the first and second substrates and partition a space between the first and second substrates into a plurality of display cells, a ferroelectric layer which is disposed to face the display cells and is formed of a ferroelectric material that is to be dielectric-polarized according to an external electric field, a first electrode and a third electrode to which electric fields having different opposite polarities are sequentially applied and which induces polarization inversion in the ferroelectric layer placed between the first and third electrodes so that the ferroelectric layer emits electron beams into the display cells, an excitation gas filled in the display cells to be excited by the electron beams, and a phosphor layer formed in the display cells. | 09-25-2008 |
| 20090108730 | Plasma Display Panel - The provided is a plasma display panel (PDP) for inducing initial discharge as short-gap discharge to prevent an increase of a discharge firing voltage, suppressing the short-gap discharge after the initial discharge, and inducing full discharge as long-gap discharge to improve luminous efficiency. The PDP includes a first substrate, a second substrate, a barrier rib, a phosphor layer, address electrodes, first and second electrodes, a dielectric layer, and a protective layer. The first and second electrodes extend in the second direction, and form a first discharge gap therebetween. The dielectric layer is formed on the second substrate while covering the first and second electrodes. The protective layer covers the dielectric layer. The protective layer includes a first secondary electron emission portion and a second secondary electron emission portion. The first secondary electron emission portion is formed to correspond to an outer remote part of the first and second electrodes and has a first secondary electron emission coefficient. The second secondary electron emission portion is formed to correspond to an outer close part of one of the first and second electrodes, and has a second secondary electron emission that is smaller than the first secondary electron emission coefficient. | 04-30-2009 |
| 20090315879 | Plasma display device - A plasma display device includes a plasma display panel (PDP), the PDP including sustain electrodes, scan electrodes, and address electrodes disposed in correspondence to a plurality of discharge cells to selectively drive at least one discharge cell of the plurality of discharge cells, a chassis base supporting the PDP, at least one printed circuit board on the chassis base, the chassis base being between the printed circuit board and the PDP, a flexible printed circuit (FPC) connecting the scan electrodes to the printed circuit board, the FPC including a switch configured to control the scan electrodes, a conductor on the FPC, the conductor overlapping the switch, and a stiffener on the conductor to dissipate heat generated from the switch. | 12-24-2009 |
