Patent application number | Description | Published |
20110294072 | METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES USING PHOTOLITHOGRAPHY - A method of manufacturing a semiconductor device using a photolithography process may include forming an anti-reflective layer and a first photoresist film on a lower surface. The first photoresist film may be exposed to light and a first photoresist pattern having a first opening may be formed by developing the first photoresist film. A plasma treatment can be performed on the first photoresist pattern and a second photoresist film may be formed on the first photoresist pattern, which may be exposed to light. A second photoresist pattern may be formed to have a second opening by developing the second photoresist film. Here, the second opening may be substantially narrower than the first opening. | 12-01-2011 |
20110300712 | Methods of Forming a Photoresist Pattern Using Plasma Treatment of Photoresist Patterns - Methods of forming a photoresist pattern include forming a first photoresist pattern on a substrate and treating the first photoresist pattern with plasma that modifies etching characteristics of the first photoresist pattern. This modification may include making the first photoresist pattern more susceptible to removal during subsequent processing. The plasma-treated first photoresist pattern is covered with a second photoresist layer, which is patterned into a second photoresist pattern that contacts sidewalls of the plasma-treated first photoresist pattern. The plasma-treated first photoresist pattern is selectively removed from the substrate to reveal the remaining second photoresist pattern. The second photoresist pattern is used as an etching mask during the selective etching of a portion of the substrate (e.g., target layer). The use of the second photoresist pattern as an etching mask may yield narrower linewidths in the etched portion of the substrate than are achievable using the first photoresist pattern alone. | 12-08-2011 |
20120064463 | Method of Forming Micropatterns - Provided is a method of forming micropatterns, in which a line-and-space pattern is formed using a positive photoresist, and a spin-on-oxide (SOX) spacer is formed on two sidewalls of the line-and-space pattern and used in etching a lower layer, thereby doubling a pattern density. Accordingly, all operations may be performed in single equipment (lithography equipment) without taking a substrate out, and thus a high throughput is obtained, and concerns about pollution are very low. Moreover, as the line-and-space pattern is formed using a wet method by using a negative tone developer, line-width roughness (LWR) of the micropatterns may be improved compared to when a dry etching method is used. | 03-15-2012 |
20120064724 | Methods of Forming a Pattern of Semiconductor Devices - Methods of forming a pattern of a semiconductor device including performing a double patterning process without using an atomic layer deposition (ALD) oxide film are provided. The methods may include forming a mask pattern on a substrate; forming a chemical attach process (CAP) material layer covering at least a portion of the mask pattern; forming a CAP adhesive layer by adhering at least a portion of the CAP material layer to the mask pattern by using a first baking process and a first development process; forming an interlayer covering at least a portion of the mask pattern and the CAP adhesive layer; and removing the mask pattern and the interlayer while allowing the CAP adhesive layer to remain by using a second baking process and a second development process. | 03-15-2012 |
20150227046 | METHODS OF MANUFACTURING A SEMICONDUCTOR DEVICE - The inventive concepts provide methods of forming a semiconductor device. The method includes forming a neutral layer having a photosensitive property and a reflow property on an anti-reflective coating layer, performing an exposure process and a development process on the neutral layer to form a preliminary neutral pattern at least partially exposing the anti-reflective coating layer, heating the preliminary neutral pattern to form a neutral pattern, forming a block copolymer layer on the neutral pattern, and heating the block copolymer layer to form a block copolymer pattern. The block copolymer pattern includes a first pattern disposed on the anti-reflective coating layer exposed by the neutral pattern, and a second pattern disposed on the neutral pattern and chemically bonded to the first pattern. | 08-13-2015 |
20150243525 | METHOD OF FORMING A FINE PATTERN BY USING BLOCK COPOLYMERS - A method of forming a fine pattern includes forming a phase separation guide layer on a substrate, forming a neutral layer on the phase separation guide layer, forming a first pattern including first openings on the neutral layer, forming a second pattern including second openings each having a smaller width than each of the first openings, forming a neutral pattern including guide patterns exposing a portion of the phase separation guide layer by etching an exposed portion of the neutral layer by using the second pattern as an etch mask, removing the second pattern to expose a top surface of the neutral pattern, forming a material layer including a block copolymer on the neutral pattern and the phase separation guide layer exposed through the guide patterns, and forming a fine pattern layer including a first block and a second block on the neutral pattern and the phase separation guide layer. | 08-27-2015 |
Patent application number | Description | Published |
20130037813 | CRYSTALLIZATION METHOD OF THIN FILM TRANSISTOR, THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD FOR THIN FILM TRANSISTOR ARRAY PANEL - Exemplary embodiments of the invention disclose a method of manufacturing a thin film transistor array panel having reduced overall processing time and providing a uniform crystallization. Exemplary embodiments of the invention also disclose a crystallization method of a thin film transistor, including forming on a substrate a semiconductor layer including a first pixel area, a second pixel area, and a third pixel area. The crystallization method includes crystallizing a portion of the semiconductor layer corresponding to a channel region of a thin film transistor using a micro lens array. | 02-14-2013 |
20140264350 | CRYSTALLIZATION METHOD OF THIN FILM TRANSISTOR, THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD FOR THIN FILM TRANSISTOR ARRAY PANEL - Exemplary embodiments of the invention disclose a method of manufacturing a thin film transistor array panel having reduced overall processing time and providing a uniform crystallization. Exemplary embodiments of the invention also disclose a crystallization method of a thin film transistor, including forming on a substrate a semiconductor layer including a first pixel area, a second pixel area, and a third pixel area. The crystallization method includes crystallizing a portion of the semiconductor layer corresponding to a channel region of a thin film transistor using a micro lens array. | 09-18-2014 |
20150155309 | DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A display substrate includes a gate metal pattern including a gate line disposed on a base substrate and a gate electrode electrically connected with the gate line, an active pattern entirely overlapped with the gate metal pattern and comprising an oxide semiconductor and a data metal pattern disposed on the active pattern and including a data line, a source electrode electrically connected with the gate line and a drain electrode spaced apart from the source electrode. The active pattern has an overlapped region in which the active pattern is overlapped with the source electrode and the drain electrode and an exposed region in which the active pattern is not overlapped with the source electrode and the drain electrode. The thickness of the overlapping region and a thickness of the exposing region are same. | 06-04-2015 |