Inventors list |
Assignees list |
Classification tree browser |
Top 100 Inventors |
Top 100 Assignees |
Jeon, Hwaseong-Si
Chang-Seong Jeon, Hwaseong-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20100105169 | SEMICONDUCTOR CHIP HAVING VIA ELECTRODES AND STACKED SEMICONDUCTOR CHIPS INTERCONNECTED BY THE VIA ELECTRODES - A semiconductor device includes a semiconductor substrate and a via electrode. The via electrode has a first portion on the substrate and extends towards the substrate and has a plurality of spikes that extends from the first portion into the substrate, each of the spikes being spaced apart form one another. | 04-29-2010 |
| 20120077314 | METHOD OF FABRICATING SEMICONDUCTOR STACK PACKAGE - Methods of fabricating a semiconductor stack package having a high capacity, a small volume and reliability. According to the method of fabricating a semiconductor stack package, a first semiconductor substrate including a plurality of first semiconductor chips is attached to a chip protection film. The chip protection film is expanded such that the plurality of the first semiconductor chips are spaced apart from each other. A plurality of second semiconductor chips are attached to the plurality of the first semiconductor chips, respectively. A molding layer is formed between the plurality of the first semiconductor chips and between the plurality of the second semiconductor chips. The molding layer and the chip protection film are sawed to separate the semiconductor stack package comprising the first semiconductor chip and the second semiconductor chip into a unit. | 03-29-2012 |
| 20120100668 | METHOD OF MANUFACTURING A FLIP CHIP PACKAGE AND APPARATUS TO ATTACH A SEMICONDUCTOR CHIP USED IN THE METHOD - A method and apparatus to manufacture a flip chip package includes dotting a flux on a first preliminary bump of a package substrate, attaching a preliminary bump of a first semiconductor chip to the first preliminary bump of the package substrate via the flux, dotting a flux on a second preliminary bump of the package substrate, and attaching a preliminary bump of a second semiconductor chip to the second preliminary bump of the package substrate via the flux. Accordingly, an evaporation of the flux on the preliminary bump of the package substrate may be suppressed. | 04-26-2012 |
Gab Bae Jeon, Hwaseong-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20110115281 | BRAKE CONTROL APPARATUS OF HYBRID VEHICLE, AND METHOD THEREOF - A braking control method of a braking control apparatus for a hybrid vehicle, may include accumulating a brake fluid amount bypassed to a reservoir tank during regenerative braking cooperation control performed by a brake demand, finishing the regenerative braking cooperation control when the accumulated brake fluid amount surpasses a predetermined value, and resetting the accumulated brake fluid amount when a brake pedal is released and a predetermined time elapses. | 05-19-2011 |
Hee-Seog Jeon, Hwaseong-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20080318406 | SPLIT GATE TYPE NONVOLATILE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME - In a split gate type nonvolatile memory device and a method of fabricating the same. A supplementary layer pattern is disposed on a source region of a semiconductor substrate. Since the source region is vertically extended by virtue of the presence of the supplementary layer pattern, it is therefore possible to increase an area of a region where a floating gate overlaps the source region and the supplementary layer pattern. Accordingly, the capacitance of a capacitor formed between the source and the floating gate increases so that it is possible for the nonvolatile memory device to perform program/erase operations at a low voltage level. | 12-25-2008 |
| 20090141562 | NON-VOLATILE MEMORY DEVICE, METHODS OF FABRICATING AND OPERATING THE SAME - A non-volatile memory device includes a floating gate formed on a substrate with a gate insulation layer interposed therebetween, a tunnel insulation layer formed on the floating gate, a select gate electrode inducing charge introduction through the gate insulation layer, and a control gate electrode inducing charge tunneling occurring through the tunnel insulation layer. The select gate electrode is insulated from the control gate electrode. According to the non-volatile memory device, a select gate electrode and a control gate electrode are formed on a floating gate, and thus a voltage is applied to the respective gate electrodes to write and erase data. | 06-04-2009 |
| 20100289071 | NON-VOLATILE MEMORY DEVICE, METHODS OF FABRICATING AND OPERATING THE SAME - A non-volatile memory device includes a floating gate formed on a substrate with a gate insulation layer interposed therebetween, a tunnel insulation layer formed on the floating gate, a select gate electrode inducing charge introduction through the gate insulation layer, and a control gate electrode inducing charge tunneling occurring through the tunnel insulation layer. The select gate electrode is insulated from the control gate electrode. According to the non-volatile memory device, a select gate electrode and a control gate electrode are formed on a floating gate, and thus a voltage is applied to the respective gate electrodes to write and erase data. | 11-18-2010 |
Jee-Hoon Jeon, Hwaseong-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20100066723 | DISPLAY APPARATUS AND METHOD OF DRIVING THE SAME - A display apparatus includes a timing controller, a column driver, a row driver and a display unit. The timing controller outputs a first column clock embedded into image data during an active period, and outputs a second column clock embedded into blank data during a blank period. The column driver detects the first column clock and the image data and converts the image data into a first analog signal using the first column clock, and detects the second column clock and the blank data and converts the blank data into a second analog signal using the second column clock. The first column clock has a voltage level greater than a voltage level of the image data. The second column clock is embedded into the blank data and has a voltage level substantially the same as the voltage level of the image data. | 03-18-2010 |
| 20100110097 | DRIVING DEVICE OF A LIGHT SOURCE MODULE, LIGHT SOURCE MODULE HAVING THE DRIVING DEVICE, DRIVING METHOD OF THE LIGHT SOURCE MODULE, AND DISPLAY DEVICE HAVING THE DRIVING DEVICE - A light source module includes a plurality of light-emitting blocks. A local-dimming driver drives the light-emitting blocks based on a received clock signal (first reference clock) and received dimming levels. The clock signal is input to a liquid crystal display panel and is also input to the local-dimming driver but is delayed within the local-dimming driver by fixed propagation delay. A delay modeling part performs modeling of the fixed propagation delay amount. The clock signal input to the local-dimming driver is first phase-compensated (delayed) by a phase compensation amount to synchronize the driving signals output by the local-dimming driver with the clock signal. The sum of the modeled propagation delay amount and the phase compensation amount is equal to an integral multiple of the period of the clock signal. The driving signal of the light-emitting blocks are synchronized and in phase with the clock signal. | 05-06-2010 |
| 20100277490 | IMAGE DRIVING APPARATUS AND DISPLAY APPARATUS INCLUDING THE SAME - A wireless and multi-channel re-transmitting link is provided between an image displaying part that is housed in a first housing and an image data processing part that is housed in a segregated second housing. The wireless link allows the image displaying part to be more easily moved around and to be made lighter and slimmer in profile because at least some image data processing can be carried out in the second housing and yet cumbersome cables are not needed for linking the pre-processed image data from the second housing to the first housing. In one embodiment, the data bandwidth. that is to he transmitted through the wireless link is first reduced; for example the frame refresh rate of image frames conveyed through each of the wireless channels is made less than the frame refresh rate of the original image signal. In one embodiment, the reduced number of frames per unit time are further frequency wise and temporally wise spaced apart from one another by alternatingly sending them through different wireless channels at different times. Thus if a burst of noise strikes one of the plural re-transmission channels, the likelihood that it will corrupt a frame is reduced. | 11-04-2010 |
| 20110115724 | DISPLAY APPARATUS - A display apparatus includes a display panel, a plurality of sensors, a read-out circuit, and a control circuit. The display panel includes a plurality of pixels receiving a data signal having a polarity reversed with respect to a common voltage to display an image. The sensors sense light to output sensing signals. The sensors may be integrated into the display panel. The read-out circuit is charged with the sensing signals generating charged signals in response to a sampling signal generated during a period in which the common voltage has a predetermined reference voltage level. The control circuit calculates a position on the display panel from the charged signals received signals from the read-out circuit. | 05-19-2011 |
| 20120099023 | DISPLAY DEVICE AND SYSTEM FOR WIRELESSLY TRANSMITTING/RECEIVING IMAGE SIGNALS - A display device and a system for wirelessly transmitting/receiving an image signal are provided. The display device includes: a display panel that displays an image; an upper housing that is disposed on a front surface of the display panel and has an open window defining a display area; a lower housing that is disposed on a rear surface of the display panel and has a hole formed in a portion of an area corresponding to the display area; and a wireless communication module that is disposed on a rear surface of the lower housing and transmits or receives a wireless signal through the hole. | 04-26-2012 |
Jeong-Sic Jeon, Hwaseong-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20090068809 | SEMICONDUCTOR MEMORY DEVICE HAVING LOCAL ETCH STOPPER AND METHOD OF MANUFACTURING THE SAME - A semiconductor memory device includes a semiconductor substrate in which a cell region and a core and peripheral region are defined. The device further comprises isolation layers formed in the semiconductor substrate to define active regions, a first gate electrode structure formed in the cell region and a second gate electrode structure formed in the core and peripheral region. Source and drain regions formed in the active regions on respective sides of each of the gate electrode structures and self-aligned contact pads are formed in the cell region in contact with the source and drain regions. An insulating interlayer is formed on the semiconductor substrate between the self-aligned contact pads, and etch stoppers are formed on the insulating interlayer between the self-aligned contact pads in the cell region. | 03-12-2009 |
Ji-Hwan Jeon, Hwaseong-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20110303962 | NON-VOLATILE MEMORY DEVICES WITH NON-UNIFORM FLOATING GATE COUPLING - A memory device includes a substrate having an active region defined therein that extends linearly along a first direction. The device also includes a select line on the substrate and extending along a second direction to perpendicularly cross the active region, first and second floating gate patterns on the active region and spaced apart along the first direction, and first and second dielectric patterns on respective ones of the first and second floating gate patterns. The device further includes first and second word lines on respective ones of the first and second dielectric patterns and extending in parallel with the select line along the first direction. A first area of overlap of the first word line with the first floating gate pattern and the first dielectric pattern is less than a second area of overlap of the second word line with the second floating gate pattern and the second dielectric pattern. The first word line may be disposed between the select line and the second word line. | 12-15-2011 |
Jin Young Jeon, Hwaseong-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20090045685 | MOTOR FIXING STRUCTURE AND MOTOR ASSEMBLY - A motor fixing structure and a motor assembly capable of reducing vibration of a motor and also maintaining a compact configuration. The motor assembly includes a motor, a fixing member disposed to be spaced from the motor by a predetermined spacing distance, and a vibration absorbing member to prevent vibration of the motor from being transferred to the fixing member, wherein the vibration absorbing member is formed to be longer by a predetermined specified length than the predetermined spacing distance between the motor and the fixing member and is disposed outside of a periphery of the motor. | 02-19-2009 |
Nam-Ho Jeon, Hwaseong-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20120098072 | Semiconductor Devices Having Lightly Doped Channel Impurity Regions - Semiconductor devices are provided including a gate across an active region of a substrate; a source region and a drain region in the active region on either side of the gate and spaced apart from each other; a main channel impurity region in the active region between the source and drain regions and having a first channel impurity concentration; and a lightly doped channel impurity region in the active region adjacent to the drain region. The lightly doped channel impurity region has the same conductivity type as the main channel impurity region and a second channel impurity concentration, lower than the first channel impurity concentration. The lightly doped channel impurity region and the main channel impurity region contain a first element. The lightly doped channel impurity region also contains a second element, which is a different Group element from the first element. | 04-26-2012 |
Peel Sik Jeon, Hwaseong-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20100097006 | SWITCHING MODE POWER SUPPLY CIRCUIT FOR PLASMA DISPLAY PANEL - The present invention relates to a switching mode power supply circuit for a plasma display panel comprising an input unit, a PFC (Power Factor Correction) unit, an output unit and a standby unit, wherein the standby unit includes a standby block for outputting a standby voltage by being connected to an AC filter stage of the input unit, a sequence block for sequentially applying power of the output unit and a control block which is connected between the standby block and the sequence block and inputs the standby voltage outputted from the standby block to the sequence block only in case that a PS_ON signal is applied. | 04-22-2010 |
Sang Jean Jeon, Hwaseong-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20090015165 | Plasma generating apparatus - A plasma generating apparatus having superior plasma generation efficiency that uses a single reaction chamber. The plasma generating apparatus includes a RF generator for providing a RF power, an antenna for generating an electromagnetic field upon receiving the RF power, a reaction chamber for exciting/ionizing a reaction gas via the electromagnetic field, and generating a plasma, and a plasma channel for absorbing the RF power, and allowing a current signal to be induced to the plasma. | 01-15-2009 |
| 20100065215 | Plasma generating apparatus - A plasma generating apparatus including a plurality of plasma source modules. Each plasma source module includes a ferrite core having high magnetic permeability and a plasma channel through which plasma may pass. The plasma generating apparatus may effectively generate and uniformly distribute large-area and high-density plasma without a dielectric window. | 03-18-2010 |
| 20120006351 | Methods Of Cleaning And Plasma Processing Apparatus For Manufacturing Semiconductors - A cleaning method for cleaning a semiconductor manufacturing apparatus may include generating plasma from a cleaning gas. The semiconductor manufacturing apparatus may be cleaned with the plasma. A positive direct-current voltage may be applied to an ESC of the semiconductor manufacturing apparatus during a cleaning of the semiconductor manufacturing apparatus. A negative direct-current voltage may be applied to the ESC during the cleaning of the semiconductor manufacturing apparatus. Also, a wall of the process chamber may be cleaned by applying the positive direct-current voltage to the ESC. | 01-12-2012 |
| 20120007503 | Plasma Generating Apparatus - At least two antenna coils are electrically connected in parallel to each other to generate uniform high density plasma, and capacitors are installed between the respective antenna coils and a ground to minimize an antenna voltage, thereby minimizing the effect of capacitive plasma coupling due to the antenna voltage. | 01-12-2012 |
Seung-Ryong Jeon, Hwaseong-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20110091128 | DISPLAY APPARATUS TO ENHANCE IMAGE QUALITY THROUGH REPEATED PROCESSING AND IMAGE PROCESSING METHOD THEREOF - A display apparatus capable of repeating an image quality enhancement process for an input image for a number of times to enhance image quality of the input image, and an image processing method thereof are provided. Accordingly, since the display apparatus repeats the image quality enhancement process for a single image frame, the display apparatus may enhance the image quality with high performance using a small memory capacity. | 04-21-2011 |
Tae-Han Jeon, Hwaseong-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20110304849 | DEVICE FOR CALIBRATING OPTICAL SCANNER, METHOD OF MANUFACTURING THE DEVICE, AND METHOD OF CALIBRATING OPTICAL SCANNER USING THE DEVICE - A device for calibrating an optical scanner includes a substrate; and a pattern disposed on the substrate, the pattern comprising a photoresist. | 12-15-2011 |
| 20120078527 | KIT AND METHOD FOR PREDICTING SENSITIVITY OF GASTRIC CANCER PATIENT TO ANTI-CANCER AGENT - A kit and method for predicting the sensitivity of gastric cancer patient to an anti-cancer agent are disclosed. | 03-29-2012 |
Wook-Jae Jeon, Hwaseong-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20110001939 | OPTICAL SYSTEM - An optical system is provided which includes an illumination system with a light source, a lens member which guides light from the light source, and a mirror member; an image unit on which an image is formed and on which light from the illumination system is incident; a projection system which magnifies and projects the image formed on the image unit; and a blocking unit which is mounted to the mirror member of the illumination system and partially blocks light from the light source that is directed to the mirror member. | 01-06-2011 |
Yong-Ho Jeon, Hwaseong-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20110284163 | PLASMA PROCESSING APPARATUS - A plasma processing apparatus includes a chamber for processing a substrate. A plasma generator is provided to generate plasma within the chamber. A window is provided in a sidewall of the chamber, and the window transmits light from the plasma within the chamber. A photocatalytic layer is provided on an inner surface of the window such that the photocatalytic layer is activated as a result of exposure to light from the plasma to decompose a residual product on the inner surface of the window. | 11-24-2011 |
| 20110318930 | METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES - A first gas for plasma etch and a second gas for plasma deposition are introduced onto a semiconductor substrate, the semiconductor substrate including a mask pattern. A flow rate of the first and second gases is periodically changed within a range of flow rates during a process cycle, such that a plasma etch process and a plasma deposition process are performed together to form an opening in the semiconductor substrate. | 12-29-2011 |
Yong-Joon Jeon, Hwaseong-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20110246931 | APPARATUS AND METHOD FOR WRITING MESSAGE IN MOBILE TERMINAL - A method and an apparatus for writing a message in a mobile terminal are provided. A method and an apparatus for simplifying movement between slides (pages) by changing the form of a slide into a collapse form when making messages that use a plurality of slides (pages) in a mobile terminal are provided. The apparatus includes a slide compressor and a message manager. The slide compressor converts an expanded slide including a message input field into a collapse slide. The message manager controls the slide compressor, and processes to output the slide converted by the slide compressor. | 10-06-2011 |
| 20110302525 | METHOD AND APPARATUS FOR DISPLAYING MESSAGE LIST IN MOBILE TERMINAL - A chat window type message list display method and a mobile terminal employing the method for displaying messages communicated with a messaging counterpart are provided. A message list display method for a mobile terminal according to the present invention includes loading, when a contact item that represents a messaging counterpart is selected, a predefined number of messages communicated most recently with the messaging counterpart among a plurality of messages communicated with the messaging counterpart, arranging the most recently communicated messages in descending order of communicated times in a direction from bottom to top of a screen, displaying a scroll bar region and a scroll bar situated at bottom end of the scroll bar region, and shrinking, while the rest of the plurality of the messages communicated with the messaging counterpart are loaded, the scroll bar downward in length according to a number of the messages loaded. | 12-08-2011 |
Yong Kwan Jeon, Hwaseong-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20120032430 | DRIVER KNEE BOLSTER OF AUTOMOBILE - A driver knee bolster may include a first bracket arranged on a cowl crossbar, wherein an upper portion may be fixed to the cowl crossbar, a second bracket disposed in front of the first bracket, wherein a lower portion of the second bracket may be coupled to a lower portion of the first bracket, and an upper portion of the second bracket may be spaced apart from the upper portion of the first bracket to form a space therebetween, and a buffering member arranged in the space formed between the first and second brackets. | 02-09-2012 |
Young-Jin Jeon, Hwaseong-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20090168549 | Data output buffer circuit and semiconductor memory device includig the same - The example embodiments provide a data output buffer circuit which includes a pre-driver configured to adjust a slew rate of an input signal, a main driver configured to output signal supplied from the pre-driver, and a ZQ calibration circuit configured to control the pre-driver so as to decrease the slew rate when an operation voltage increases, and increase the slew rate when the operation voltage is decreased. | 07-02-2009 |
| 20110205832 | ON-DIE TERMINATION CIRCUIT, MEMORY DEVICE, MEMORY MODULE, AND METHOD OF OPERATING AND TRAINING AN ON-DIE TERMINATION - An on-die termination (ODT) circuit of a memory device comprising: a memory device having a memory core having a memory cell array; a data input/output pin connected to the memory core through a data buffer; and an on-die termination (ODT) circuit, comprising: a termination circuit configured to provide a termination impedance at the input/output data pin, the termination circuit having a switching device that selectively connects a termination impedance to the input/output data pin based on the presence of an asynchronous control signal (ACS), wherein the ACS is generated based on the presence of a memory WRITE command. The memory device may further comprise a training circuit comprising: an asynchronous signal delay configured to delay the signal path of the ACS signal to the termination circuit; and a comparing unit configured to compare a phase difference between the ACS signal and a reference signal, the comparing unit comprising a phase detector and a replica delay, wherein the replica delay is configured to delay the signal path of the ACS signal to the phase detector, and the phase detector is configured to output the phase difference as training result. | 08-25-2011 |
Young-Ki Jeon, Hwaseong-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20100128721 | APPARATUS AND METHOD FOR PROVIDING OTHER SERVICE IN IP MULTIMEDIA SUBSYSTEM (IMS) - An apparatus and a method for providing other Voice over Internet Protocol (VoIP) services (e.g., Skype, Google talk, and the like) using a terminal which supports an IP Multimedia Subsystem (IMS) network are provided. The apparatus includes an interworking apparatus for converting information received from a VoIP service network to information supportable by an IMS terminal to interwork the IMS terminal and other VoIP services not supported by the IMS terminal, and converting information received from the IMS terminal to information supportable by a VoIP service network. | 05-27-2010 |
| 20110165868 | METHOD AND APPARATUS FOR LOCATION BASED CALL SIGNAL CONVERSION SERVICE IN A WIRE-LESS COMMUNICATION NETWORK - The present invention relates to an apparatus and method for location based call signal conversion in a wireless communication network. The location based call signal conversion apparatus comprises an LBS (Location Based Service) server that provides location information on user terminals, and a call signal conversion server that converts the called signal to anyone called terminal on the called target terminal list that has been set up according to the current location of said called user terminal if a call connection request to a receiving user terminal from a sending user terminal is sensed among said user terminals, and if conditions for call signal conversion are satisfied according to the location and state of said called user terminal. | 07-07-2011 |