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Jeng, CA

Dennis Jeng, Yorba Linda, CA US

Patent application numberDescriptionPublished
20090125350SYSTEM AND METHOD FOR CAPTURING AND STORING SUPPLY CHAIN AND LOGISTICS SUPPORT INFORMATION IN A RELATIONAL DATABASE SYSTEM - A computer implemented method of and system for capturing, storing and organizing supply chain and logistics support information for a retail enterprise. Supply chain and logistics support information is stored and organized within a relational database in accordance with a logical data model comprising a plurality subject areas, and entities and relationships within the subject areas, defining the manner in which supply chain and logistics support information is stored and organized within the relational database. The relational database, populated with this information, provides a retail enterprise with detailed tracking and analysis support for shipping orders, freight bills, shipping order claims, and invoices; and detailed support for fleet tracking of shipments in the areas of legs, lanes and associated routes traveled, mode of transport, and specific equipment utilized in handling of shipments; allowing for improved supply chain efficiency through better informed decision making.05-14-2009
20090157749SYSTEM AND METHOD FOR CAPTURING AND STORING QUALITY FEEDBACK INFORMATION IN A RELATIONAL DATABASE SYSTEM - A computer implemented method of and system for capturing, storing and organizing quality feedback information associated with products sold by a retail enterprise. The quality feedback information is stored and organized within a relational database in accordance with a logical data model comprising a plurality of entities and relationships defining the manner in which quality feedback information is stored and organized within the relational database. The relational database, populated with quality feedback information, provides the retail enterprise with the means to analyze and improve retail operations, to better manage store inventory, and more efficiently manage product sales and returns.06-18-2009
20100077074TECHNIQUES FOR HIERARCHICAL REPORT TOOL SESSION MANAGEMENT - Techniques are presented for hierarchical report tool session management. A user interacts with a hierarchical reporting tool during a first session and reaches a specific nested level within the tool for a particular hierarchy being accessed by the user. At some point in time the user exits the tool (normally or abnormally). The specific nested level is maintained on behalf of the user. So, when the user initiates a second and subsequent session with the tool, the user is presented with the specific nested level when the tool is started for that subsequent session.03-25-2010

Patent applications by Dennis Jeng, Yorba Linda, CA US

Isaac M. Jeng, Yorba Linda, CA US

Patent application numberDescriptionPublished
20090232164APPARATUS AND METHOD FOR TIME WEIGHTED BPSK CODE COMBINING - A method for time weighted combining of a plurality of binary phase shift key (BPSK) code sequences that is implemented by providing first, second and third sequences of chips of a BPSK code having a first, second and third code powers, respectively. A majority vote (MV) sequence of chips from the first, second and third sequences of chips is determined and a time multiplexed composite BPSK composite code sequence is formed by selecting a specific number of samples from each of the MV sequence of chips, and the two sequences of chips of the first, second and third sequences of chips that have the highest code powers, to form samples in a unit duration.09-17-2009

Isaac Ming-En Jeng, Yorba Linda, CA US

Patent application numberDescriptionPublished
20090033525GAIN WEIGHTED CODE COMBINING SYSTEM AND METHOD FOR COMBINING THREE BPSK CODES - A method and system for generating a composite binary phase shift keying (BPSK) code from three independent component BPSK codes that is representative of each of the three component BPSK codes. According to one embodiment the method involves gain weighting each of first, second and third BPSK codes by its respective code power ratio to form first, second and third gain weighted codes. The first, second and third gain weighted codes are processed in accordance with an algorithm to form a composite BPSK code. The composite BPSK code has a fifty to seventy-five percent probability of matching each one of the component BPSK codes. A system for generating a composite BPSK code from three component BPSK codes is also disclosed.02-05-2009
20090034645SYSTEM AND METHOD FOR GAIN WEIGHTED CODE COMBINING FOR TWO BINARY PHASE SHIFT KEYING CODES - A method and system for generating a composite binary phase shift keying (BPSK) code from two independent component BPSK codes that is representative of the two component BPSK codes. In one implementation the method involves gain weighting each of the first and second component BPSK codes by its respective code power ratio to form first and second gain weighted codes. The first and second gain weighted codes are processed in accordance with an algorithm to form a composite BPSK code. The composite BPSK code has a fifty to seventy-five percent probability of matching each one of the BPSK codes. A system for generating a composite BPSK code from two BPSK codes is also disclosed.02-05-2009
20090046810GAIN WEIGHTED CODE COMBINING SYSTEM AND METHOD FOR COMBINING BPSK CODES - A method and system for generating a composite binary phase shift keying (BPSK) code from at least two independent component BPSK codes that is representative of each of the component BPSK codes. According to one embodiment the method involves gain weighting each BPSK code by its respective code power ratio to form a corresponding pluarity of gain weighted codes. The gain weighted codes are then processed in accordance with an algorithm to form a composite BPSK code. The composite BPSK code has at least a fifty percent probability of matching each one of the component BPSK codes. Specific implementations for generating a composite BPSK code from either two component BPSK codes, or from three component BPSK codes, are also disclosed.02-19-2009

James Ywh-Ren Jeng, Irvine, CA US

Patent application numberDescriptionPublished
20100118551Illuminating device and light emitting unit - An illuminating device comprising a lampshade, an electric connector and a light emitting unit, in which the lampshade has therein a receiving space for receiving the light emitting unit, and for fixing the electric connector on its rear side to connect a pair of electric power lines, the illuminating device is characterized in that: the light emitting unit includes two plug-in pins, a front half part of each plug-in pin is an arched elastic buffering portion, and a rear half part of the plug-in pin is a fixing portion; when the two plug-in pins are fixed onto the electric connector, the elastic buffering portions can absorb outwardly stretching deforming forces exerted on the plug-in pins, thus avoid breaking of the plug-in pins in bearing forces, superiority of production can be effectively increased, and the life of use of the illuminating device can be elongated.05-13-2010

Min Chie Jeng, Cupertino, CA US

Patent application numberDescriptionPublished
20090119085METHOD AND SYSTEM FOR MODELING DYNAMIC BEHAVIOR OF A TRANSISTOR - Method and system are disclosed for modeling dynamic behavior of a transistor. The method includes representing static behavior of a transistor using a lookup table, selecting an instance of the transistor from the lookup table for modeling dynamic behavior of the transistor, computing a previous state of the instance using a non-quasi static analytical model, computing a variation in channel charge of the instance according to a rate of change in time, computing a current state of the instance using the previous state and the variation in channel charge, computing a modified terminal voltage that includes a dynamic voltage across a parasitic resistance at the terminal of the transistor according to the current state and previous state of the instance, and storing the modified terminal voltage in a memory device for modeling dynamic behavior of the transistor at the current state.05-07-2009
20100059824SYSTEM AND METHOD FOR I/O ESD PROTECTION WITH POLYSILICON REGIONS FABRICATED BY PROCESSES FOR MAKING CORE TRANSISTORS - A system and method for electrostatic discharge protection. The system includes a first transistor coupled to a first system and including a first gate, a first dielectric layer located between the first gate and a first substrate, a first source, and a first drain. The first system includes or is coupled to a core transistor, and the core transistor includes a second gate, a second dielectric layer located between the second gate and a second substrate, a second source, and a second drain. The first transistor is selected from a plurality of transistors, and the plurality of transistors include a plurality of gate regions, a plurality of source regions, and a plurality of drain regions. A plurality of polysilicon regions are disposed in an proximity of at least one of the plurality of gate regions. The plurality of polysilicon regions are separated from the first substrate a plurality of dielectric layers;03-11-2010

Patent applications by Min Chie Jeng, Cupertino, CA US