Patent application number | Description | Published |
20140264710 | SEAL RING STRUCTURE WITH ROUNDED CORNERS FOR SEMICONDUCTOR DEVICES - Seal ring structures are provided with rounded corner junctions or corner junctions that include polygons. The seal rings surround generally rectangular semiconductor devices such as integrated circuits, image sensors and other devices. The seal ring includes a configuration of two sets of generally parallel opposed sides and the corner junctions are the junctions at which adjacent orthogonal seal ring sides are joined. The seal rings are trench structures or filled trench structures in various embodiments. The rounded corner junctions are formed by a curved arc or multiple line segments joined together at various angles. The corner junctions that include one or more enclosed polygons include polygons with at least one polygon side being formed by one of the seal ring sides. | 09-18-2014 |
20140319626 | Metal Gate Stack Having TiAlCN as Work Function Layer and/or Blocking/Wetting Layer - A metal gate stack having a titanium aluminum carbon nitride (TiAlCN) as a work function layer and/or a multi-function blocking/wetting layer, and methods of manufacturing the same, are disclosed. In an example, an integrated circuit device includes a semiconductor substrate and a gate stack disposed over the semiconductor substrate. The gate stack includes a gate dielectric layer disposed over the semiconductor substrate, a multi-function blocking/wetting layer disposed over the gate dielectric layer, wherein the multi-function blocking/wetting layer includes TiAlCN, a work function layer disposed over the multi-function blocking/wetting layer, and a conductive layer disposed over the work function layer. | 10-30-2014 |
20140367820 | Methods of Manufacturing and Using a Photodiode with Concave Reflector - A photodiode structure includes a photodiode and a concave reflector disposed below the photodiode. The concave reflector is arranged to reflect incident light from above back toward the photodiode. | 12-18-2014 |
20150041851 | CIS Image Sensors with Epitaxy Layers and Methods for Forming the Same - A method includes performing a first epitaxy to grow a first epitaxy layer of a first conductivity type, and performing a second epitaxy to grow a second epitaxy layer of a second conductivity type opposite the first conductivity type over the first epitaxy layer. The first and the second epitaxy layers form a diode. The method further includes forming a gate dielectric over the first epitaxy layer, forming a gate electrode over the gate dielectric, and implanting a top portion of the first epitaxy layer and the second epitaxy layer to form a source/drain region adjacent to the gate dielectric. | 02-12-2015 |
20150044810 | Backside Illumination Image Sensor Chips and Methods for Forming the Same - A die includes a first plurality of edges, and a semiconductor substrate in the die. The semiconductor substrate includes a first portion including a second plurality of edges misaligned with respective ones of the first plurality of edges. The semiconductor substrate further includes a second portion extending from one of the second plurality of edges to one of the first plurality of edges of the die. The second portion includes a first end connected to the one of the second plurality of edges, and a second end having an edge aligned to the one of the first plurality of edges of the die. | 02-12-2015 |
20150054029 | Metal Gate Stack Having TaAlCN Layer - An integrated circuit device includes a semiconductor substrate; and a gate stack disposed over the semiconductor substrate. The gate stack further includes a gate dielectric layer disposed over the semiconductor substrate; a multi-function blocking/wetting layer disposed over the gate dielectric layer, wherein the multi-function blocking/wetting layer comprises tantalum aluminum carbon nitride (TaAlCN); a work function layer disposed over the multi-function blocking/wetting layer; and a conductive layer disposed over the work function layer. | 02-26-2015 |
20150123225 | BACKSIDE ILLUMINATOR IMAGE SENSOR DEVICE WITH SHIELDING LAYER - A backside illuminated image sensor device with a shielding layer and a manufacturing method thereof are provided. In the backside illuminated image senor device, a patterned conductive shielding layer is formed on a dielectric layer on a backside surface of a semiconductor substrate and surrounding a pixel array on a front side surface of the semiconductor substrate. | 05-07-2015 |
20150130001 | IMAGE SENSOR AND METHOD FOR MANUFACTURING THEREOF - An image sensor is provided including a substrate, an array of photosensitive units, a grid and a plurality of color filters. In the image sensor, the grid has a first portion and a second portion disposed on the first portion. The second portion of the grid can cause reflection or refraction of incident lights targeted for one image sensor element back into the same image sensor element, so as to avoid crosstalk occurred. Further, a method for manufacturing the image sensor also provides herein. | 05-14-2015 |
20150130002 | IMAGE SENSOR AND METHOD FOR MANUFACTURING THEREOF - An image sensor is provided including a substrate, an array of photosensitive units, a grid, a light-tight layer and a plurality of color filters. In the image sensor, the grid has a top surface, and the light-tight layer is disposed on the top surface of the grid. Due to the light-tight layer on the grid, an incident light entering into the grid can be blocked by the light-tight layer, so that the crosstalk effect is reduced significantly. Further, a method for manufacturing the image sensor also provides herein. | 05-14-2015 |
20150132919 | PHOTOMASK AND METHOD FOR FORMING DUAL STI STRUCTURE BY USING THE SAME - In a method for manufacturing a dual shallow trench isolation structure, a substrate is provided, and a mask layer is formed on the substrate. The mask layer is patterned by using a photomask to form at least one first hole and at least one second hole in the mask layer, in which a depth of the at least one first hole is different from a depth of the at least one second hole. The mask layer and the substrate are etched to form at least one first trench having a first depth and at least one second trench having a second depth, in which the first depth is different from the second depth. The remaining mask layer is removed. A first isolation layer and A second isolation layer are respectively formed in the at least one first trench and the at least one second trench. | 05-14-2015 |
20150145083 | Structure Of Dielectric Grid For A Semiconductor Device - An image sensor device and a method for manufacturing the image sensor device are provided. An image sensor device includes a pixel region and a non-pixel region in a substrate. In the pixel region there is a plurality of sensor elements. The non-pixel region is adjacent to the pixel region and has no sensor element. Dielectric grids are disposed in the pixel region with a first dielectric trench between two adjacent dielectric grids. The first dielectric trench aligns to a respective sensor element. Second dielectric trenches are disposed in the non-pixel region. | 05-28-2015 |
20150155320 | MECHANISMS FOR FORMING IMAGE SENSOR DEVICE - Embodiments of mechanisms for forming an image sensor device are provided. The image sensor device includes a semiconductor substrate and a photodetector in the semiconductor substrate. The image sensor device also includes a dielectric layer over the semiconductor substrate, and the dielectric layer has a recess aligned with the photodetector. The image sensor device further includes a filter in the recess of the dielectric layer. In addition, the image sensor device includes a shielding layer between the dielectric layer and the semiconductor substrate and surrounding the filter. | 06-04-2015 |
20150179690 | MECHANISMS FOR FORMING IMAGE SENSOR DEVICE - Embodiments of mechanisms for forming an image sensor device are provided. The image sensor device includes a semiconductor substrate and an isolation structure in the semiconductor substrate. The image sensor device also includes an active region in the semiconductor substrate and surrounded by the isolation structure. The active region includes a light sensing region and a doped region, and the doped region has a horizontal length and a vertical length. A ratio of the horizontal length to the vertical length is in a range from about 1 to about 4. | 06-25-2015 |
20150189207 | Protection Layer In CMOS Image Sensor Array Region - A semiconductor image sensor device having a conformal protective layer includes a semiconductor substrate a pixel-array region and a peripheral region. The conformal protective layer is disposed over a plurality of pixels having a photodiode and a plurality of transistors in the pixel-array region. Contacts to the plurality of transistors are surrounded by the conformal protective layer. In some embodiments, the conformal protective layer is the same material as transistor gate spacers in the peripheral region. | 07-02-2015 |
20150214272 | Metal Shield Structure and Methods for BSI Image Sensors - A backside illumination image sensor structure comprises an image sensor formed adjacent to a first side of a semiconductor substrate, wherein an interconnect layer is formed over the first side of the semiconductor substrate, a backside illumination film formed over a second side of the semiconductor substrate, a metal shielding layer formed over the backside illumination film and a via embedded in the backside illumination film and coupled between the metal shielding layer and the semiconductor substrate. | 07-30-2015 |
20150228593 | Under Bump Metallization - A structure of an under bump metallization and a method of forming the same are provided. The under bump metallization has a redistribution via hole, viewed from the top, in a round shape or a polygon shape having an angle between adjacent edges greater than 90°. Therefore, the step coverage of the later formed metal layer can be improved. | 08-13-2015 |
20150228720 | SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF - A semiconductor structure includes a wafer including a first surface and a periphery, a plurality of protrusions protruded from the first surface and a plurality of recesses spaced from each other by the plurality of protrusions, and each of the plurality of recesses is extended from the periphery of the wafer and is elongated across the first surface of the wafer. | 08-13-2015 |
20150243696 | IMAGE SENSOR DEVICE WITH LIGHT BLOCKING STRUCTURE - The disclosure provides an image sensor device and a manufacturing method. The image sensor device includes a semiconductor substrate and a light sensing region in the semiconductor substrate. The image sensor device also includes a light blocking structure in the semiconductor substrate and adjacent to the light sensing region. A sidewall of the light blocking structure is a curved surface. | 08-27-2015 |
20150243697 | IMAGE SENSOR DEVICE AND METHOD FOR FORMING THE SAME - Embodiments of the disclosure provide an image sensor device. The image sensor device includes a semiconductor substrate. The semiconductor substrate has a front surface, a back surface opposite to the front surface, a light-sensing region close to the front surface, and a trench adjacent to the light-sensing region. The image sensor device includes a reflective layer positioned on an inner wall of the trench, wherein the reflective layer has a light reflectivity ranging from about 70% to about 100%. | 08-27-2015 |
20150243805 | IMAGE SENSOR DEVICE AND METHOD FOR FORMING THE SAME - Embodiments of the disclosure provide an image sensor device. The image sensor device includes a semiconductor substrate including a front surface, a back surface opposite to the front surface, a light-sensing region close to the front surface, and a trench adjacent to the light-sensing region. The image sensor device includes a light-blocking structure positioned in the trench to absorb or reflect incident light. | 08-27-2015 |
20150263054 | DEEP TRENCH ISOLATION WITH AIR-GAP IN BACKSIDE ILLUMINATION IMAGE SENSOR CHIPS - An integrated circuit structure includes a semiconductor substrate, an image sensor extending from a front surface of the semiconductor substrate into the semiconductor substrate, and an isolation structure extending from a back surface of the semiconductor substrate into the semiconductor substrate, wherein the isolation structure includes an air-gap therein. An air-gap sealing layer is on a backside of the semiconductor substrate. The air-gap sealing layer seals the air-gap, wherein the air-gap sealing layer includes a portion exposed to the air-gap. | 09-17-2015 |
20150264233 | IMAGE SENSOR DEVICE WITH LIGHT GUIDING STRUCTURE - An image sensor device and a manufacturing method for forming an image sensor device are provided. The image sensor device includes a semiconductor substrate having an array region and a periphery region. The image sensor device also includes a light sensing region in the array region of the semiconductor substrate. The image sensor device further includes a dielectric structure over the array region and the periphery region, and the dielectric structure has a substantially planar top surface. In addition, the image sensor device includes a recess in the dielectric structure and substantially aligned with the light sensing region. The image sensor device also includes a filter in the recess and a light blocking grid in the dielectric structure and surrounding a portion of the filter. | 09-17-2015 |
20150333007 | METAL PAD OFFSET FOR MULTI-LAYER METAL LAYOUT - A semiconductor device includes a first layer including a number of first layer metal pads, a second layer formed on top of the first layer, the second layer including a number of second layer metal pads, and vias connecting the first layer metal pads to the second layer metal pads. A surface area overlap between the first layer metal pads and the second layer metal pads is below a defined threshold. | 11-19-2015 |
20150364579 | STRUCTURE AND FORMATION METHOD OF FIN-LIKE FIELD EFFECT TRANSISTOR - A structure and a formation method of a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and a fin structure over the semiconductor substrate. The semiconductor device also includes a gate stack covering a portion of the fin structure and an epitaxially grown source/drain structure over the fin structure and adjacent to the gate stack. The semiconductor device further includes a semiconductor protection layer over the epitaxially grown source/drain structure. The semiconductor protection layer has an atomic concentration of carbon greater than that of the epitaxially grown source/drain structure. | 12-17-2015 |
20150364580 | STRUCTURE AND FORMATION METHOD OF FIN-LIKE FIELD EFFECT TRANSISTOR - A structure and a formation method of a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and a fin structure over the semiconductor substrate. The semiconductor device also includes a gate stack covering a portion of the fin structure and an epitaxially grown source/drain structure over the fin structure and adjacent to the gate stack. The semiconductor device further includes a semiconductor protection layer over the epitaxially grown source/drain structure. The semiconductor protection layer has an atomic concentration of germanium greater than that of the epitaxially grown source/drain structure. | 12-17-2015 |
20150364593 | STRUCTURE AND FORMATION METHOD OF FIN-LIKE FIELD EFFECT TRANSISTOR - A structure and a formation method of a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and a fin structure over the semiconductor substrate. The semiconductor device also includes a gate stack covering a portion of the fin structure and an epitaxially grown source/drain structure over the fin structure and adjacent to the gate stack. The semiconductor device further includes a semiconductor protection layer over the epitaxially grown source/drain structure. The semiconductor protection layer has an atomic concentration of silicon greater than that of the epitaxially grown source/drain structure. | 12-17-2015 |
20150372045 | Backside Illumination Image Sensor Chips and Methods for Forming the Same - A die includes a first plurality of edges, and a semiconductor substrate in the die. The semiconductor substrate includes a first portion including a second plurality of edges misaligned with respective ones of the first plurality of edges. The semiconductor substrate further includes a second portion extending from one of the second plurality of edges to one of the first plurality of edges of the die. The second portion includes a first end connected to the one of the second plurality of edges, and a second end having an edge aligned to the one of the first plurality of edges of the die. | 12-24-2015 |
20160005781 | BACKSIDE ILLUMINATED IMAGE SENSOR AND METHOD OF MANUFACTURING THE SAME - A backside illuminated (BSI) image sensor device includes: a first substrate including a front side and a back side; a second substrate bonded with the first substrate on the front side; and a blocking layer between the first substrate and the second substrate. The first substrate includes an image sensor, and the image sensor is configured to collect incident light entering from the back side. The second substrate includes a circuit coupled with the image sensor. The blocking layer is configured to block radiation induced by the circuit. | 01-07-2016 |
Patent application number | Description | Published |
20130249040 | Structures for Grounding Metal Shields in Backside Illumination Image Sensor Chips - A device includes a semiconductor substrate having a front side and a backside. A photo-sensitive device is disposed on the front side of the semiconductor substrate. A dielectric layer is disposed on the backside of the semiconductor substrate, wherein the dielectric layer is over a back surface of the semiconductor substrate. A metal shield is over the dielectric layer and overlapping the photo-sensitive device. A metal plug penetrates through the dielectric layer, wherein the metal plug electrically couples the metal shield to the semiconductor substrate. | 09-26-2013 |
20130256893 | BONDING PAD STRUCTURE WITH DENSE VIA ARRAY - A bonding pad structure includes a substrate and a first conductive island formed in a first dielectric layer and disposed over the substrate. A first via array having a plurality of vias is formed in a second dielectric layer and disposed over the first conductive island. A second conductive island is formed in a third dielectric layer and disposed over the first via array. A bonding pad is disposed over the second conductive island. The first conductive island, the first via array, and the second conductive island are electrically connected to the bonding pad. The first via array is connected to no other conductive island in the first dielectric layer except the first conductive island. No other conductive island in the third dielectric layer is connected to the first via array except the second conductive island. | 10-03-2013 |
20130320478 | System and Method for Processing a Backside Illuminated Photodiode - System and method for processing a semiconductor device surface to reduce dark current and white pixel anomalies. An embodiment comprises a method applied to a semiconductor or photodiode device surface adjacent to a photosensitive region, and opposite a side having circuit structures for the device. A doped layer may optionally be created at a depth of less than about 10 nanometers below the surface of the substrate and may be doped with a boron concentration between about 1 | 12-05-2013 |
20140070352 | Stress Release Layout and Associated Methods and Devices - An embodiment semiconductor device includes a substrate such as a silicon or silicon-containing film, a pixel array supported by the substrate, and a metal stress release feature arranged around a periphery of the pixel array. The metal stress release feature may be formed from metal strips or discrete metal elements. The metal stress release feature may be arranged in a stress release pattern that uses a single line or a plurality of lines. The metal stress release pattern may also use metal corner elements at ends of the lines. | 03-13-2014 |
20140167197 | Metal Shield Structure and Methods for BSI Image Sensors - A backside illumination image sensor structure comprises an image sensor formed adjacent to a first side of a semiconductor substrate, wherein an interconnect layer is formed over the first side of the semiconductor substrate, a backside illumination film formed over a second side of the semiconductor substrate, a metal shielding layer formed over the backside illumination film and a via embedded in the backside illumination film and coupled between the metal shielding layer and the semiconductor substrate. | 06-19-2014 |
20140167199 | SYSTEM AND METHOD FOR DIE TO DIE STRESS IMPROVEMENT - A semiconductor wafer having a plurality of chip die areas arranged on a wafer in an array, each chip die area including a seal ring area with one or more first sets of polygonal structures. The wafer further comprises scribe line areas between the chip die areas, the scribe line areas including one or more second sets of polygonal structures. The presence of proximate polygonal structures between the scribe line and seal ring areas balance stresses between the chip die areas during wafer dicing operation. | 06-19-2014 |
20140210029 | Backside Illumination Image Sensor Chips and Methods for Forming the Same - A die includes a first plurality of edges, and a semiconductor substrate in the die. The semiconductor substrate includes a first portion including a second plurality of edges misaligned with respective ones of the first plurality of edges. The semiconductor substrate further includes a second portion extending from one of the second plurality of edges to one of the first plurality of edges of the die. The second portion includes a first end connected to the one of the second plurality of edges, and a second end having an edge aligned to the one of the first plurality of edges of the die. | 07-31-2014 |
20140211057 | Black Level Control for Image Sensors - An embodiment image sensor includes a pixel region spaced apart from a black level control (BLC) region by a buffer region. In an embodiment, a light shield is disposed over the BLC region and extends into the buffer region. In an embodiment, the buffer region includes an array of dummy pixels. Such embodiments effectively reduce light cross talk at the edge of the BLC region, which permits more accurate black level calibration. Thus, the image sensor is capable of producing higher quality images. | 07-31-2014 |
20140263944 | Light Sensing Device with Outgassing Hole - A light sensing device includes a substrate, a light sensing area on the substrate, and a light shielding layer over the substrate. The light shielding layer does not cover the light sensing area. At least one outgassing hole is formed through the light shielding layer. | 09-18-2014 |
20140264685 | IMAGE SENSOR WITH STACKED GRID STRUCTURE - Among other things, one or more image sensors and techniques for guiding light towards a photodiode are provided. An image sensor comprises a metal grid configured to direct light towards a corresponding photodiode and away from other photodiodes. The image sensor also comprises a dielectric grid and a filler grid over the metal grid to direct light towards the corresponding photodiode and away from other photodiodes, where the filler grid has a different refractive index than the dielectric grid. In this way, crosstalk, otherwise resulting from detection of light by incorrect photodiodes, is mitigated. | 09-18-2014 |
20140264696 | DIELECTRIC FILM FOR IMAGE SENSOR - Among other things, one or more image sensors and techniques for forming such image sensors are provided. An image sensor comprises a photodiode array configured to detect light. The image sensor comprises a calibration region configured to detect a color level for image reproduction, such as a black calibration region configured to detect a black level for an image detected by the photodiode array. The image sensor comprises a dielectric film that is formed over the photodiode array and the calibration region. The dielectric film is configured to balance stress between the photodiode and the calibration region in order to improve accuracy of the calibration region. | 09-18-2014 |
20140268609 | SUPPORT STRUCTURE FOR INTEGRATED CIRCUITRY - Among other things, one or more support structures for integrated circuitry and techniques for forming such support structures are provided. A support structure comprises one or more trench structures, such as a first trench structure and a second trench structure formed around a periphery of integrated circuitry. In some embodiments, one or more trench structures are formed according to partial substrate etching, such that respective trench structures are formed into a region of a substrate. In some embodiments, one or more trench structures are formed according to discontinued substrate etching, such that respective trench structures comprise one or more trench portions separated by separation regions of the substrate. The support structure mitigates stress energy from reaching the integrated circuitry, and facilitates process-induced charge release from the integrated circuitry. | 09-18-2014 |
20150014802 | APPARATUS AND METHOD FOR FABRICATING A LIGHT GUIDING GRID - A light guide grid can include a grid structure having a plurality of intersecting grid lines, each grid line having a width w, and a plurality of openings for photosensor elements between intersecting grid lines. The grid structure has a diagonal grid width between two adjacent ones of the plurality of openings in a diagonal direction. The diagonal grid width has a value exceeding approximately √3 w. An image sensor can include a light guide grid having a grid structure as described above and further include a micro-lens such as a sinking micro-lens and a color filter. A method of fabricating a light guide grid can include forming a grid above at least one photo sensor, the grid having intersecting grid lines of width w and a diagonal grid width in a diagonal direction having a value exceeding approximately √3 w. | 01-15-2015 |
20150021728 | Dielectric Structure for Color Filter Array - An integrated circuit device in which an array of photodiodes are formed at the surface of a semiconductor substrate. A dielectric structure comprising multiple layers of dielectric is formed over the photodiodes. An array of color filters is formed over the photodiodes and within the dielectric structure. An interface between two layers of the dielectric structure is aligned with the bases of the color filters. The interface provides an etch stops that allows the depths of the trenches in which the color filters are formed to be well controlled. | 01-22-2015 |
20150048467 | Structure of Dielectric Grid with a Metal Pillar for Semiconductor Device - An image sensor device and a method for manufacturing the image sensor device are provided. An image sensor device includes a substrate, sensor elements disposed at a front surface of the substrate, and a dielectric grid disposed over a back surface of the substrate. The dielectric grid includes a first dielectric layer as a bottom portion, a metal pillar, as a core portion of a upper portion, disposed over the first dielectric layer and a second dielectric layer wrapping around the metal pillar. The image sensor device also includes a stack of layers disposed over the back surface of the substrate. Refractive index of each layers increases from top layer to bottom layer. The image sensor device also includes a color filter and a microlens disposed over the back surface of the substrate. | 02-19-2015 |
20150214165 | BONDING PAD STRUCTURE WITH DENSE VIA ARRAY - A bonding pad structure comprises a first dielectric layer, a first conductive island in a second dielectric layer over the first dielectric layer and a via array having a plurality of vias in a third dielectric layer over the first conductive island. The structure also comprises a plurality of second conductive islands in a fourth dielectric layer over the via array. The second conductive islands are each separated from one another by a dielectric material of the fourth dielectric layer and in contact with at least one via of the via array. The structure further comprises a substrate over the second conductive islands. The substrate has an opening defined therein that exposes at least one second conductive island. The structure additionally comprises a bonding pad over the substrate. The bonding pad is in contact with the at least one second conductive island through the opening in the substrate. | 07-30-2015 |
Patent application number | Description | Published |
20130171766 | Annealing Methods for Backside Illumination Image Sensor Chips - A method includes performing a grinding on a backside of a semiconductor substrate. An image sensor is disposed on a front side of the semiconductor substrate. An impurity is doped into a surface layer of the backside of the semiconductor substrate to form a doped layer. A multi-cycle laser anneal is performed on the doped layer. | 07-04-2013 |
20130193539 | Method for Increasing Photodiode Full Well Capacity - A backside illuminated CMOS image sensor comprises an extended photo active region formed over a substrate using a first high energy ion implantation process and an isolation region formed over the substrate using a second high energy ion implantation process. The extended photo active region is enclosed by the isolation region, which has a same depth as the extended photo active region. The extended photo active region helps to increase the number of photons converted into electrons so as to improve quantum efficiency. | 08-01-2013 |
20130207220 | Image Sensor Cross-Talk Reduction System and Method - A system and method for reducing cross-talk between photosensitive diodes is provided. In an embodiment an isolation region comprising a first concentration of dopants is located between the photosensitive diodes. The photosensitive diodes have a second concentration of dopants that is less than the first concentration of dopants, which helps to prevent diffusion from the photosensitive diodes to form a potential path for undesired cross-talk between the photosensitive diodes. | 08-15-2013 |
20130230941 | Implanting Method for Forming Photodiode - An implanting method for forming a photodiode comprises providing a substrate with a first conductivity, growing an epitaxial layer on the substrate, implanting ions with a second conductivity in the epitaxial layer from a front side of the substrate and implanting ions with the first conductivity in the epitaxial layer from the front side of the substrate to form a photo active region adjacent to the front side and a photo inactive region underneath the photo active region. By employing the implanting method, an average doping density of the photo active region is approximately ten times more than an average doping density of the photo inactive region. | 09-05-2013 |
20130277790 | Dual Profile Shallow Trench Isolation Apparatus and System - The presented principles describe an apparatus and method of making the same, the apparatus being a semiconductor circuit device, having shallow trench isolation features bounding an active area and a periphery area on a semiconductor substrate to electrically isolate structures in the active area from structures in the periphery area. The shallow trench isolation feature bounding the active area is shallower than the shallow trench isolation feature bounding the periphery area, with the periphery area shallow trench isolation structure being formed through two or more etching steps. | 10-24-2013 |
20130320419 | CIS Image Sensors with Epitaxy Layers and Methods for Forming the Same - A method includes performing a first epitaxy to grow a first epitaxy layer of a first conductivity type, and performing a second epitaxy to grow a second epitaxy layer of a second conductivity type opposite the first conductivity type over the first epitaxy layer. The first and the second epitaxy layers form a diode. The method further includes forming a gate dielectric over the first epitaxy layer, forming a gate electrode over the gate dielectric, and implanting a top portion of the first epitaxy layer and the second epitaxy layer to form a source/drain region adjacent to the gate dielectric. | 12-05-2013 |
Patent application number | Description | Published |
20150260088 | INTAKE/OUTLET PIPE OPTIMIZATION METHOD FOR ROTARY ENGINE - An intake/outlet pipe optimization method and apparatus for a rotary engine are disclosed. The method includes the steps of providing a rotary engine, measuring the pressure in an operation of the engine, designing the appearance of the intake/outlet pipes, adjusting the pressure wave in an air pipe and the pressure in an air chamber of the engine to increase the air intake and improve the output horsepower of the engine. The intake pipe is a tapered pipe having the pipe diameter on an intake side greater than the pipe diameter on the engine side; and the outlet pipe is an inversely tapered pipe having the pipe diameter on the engine side smaller than the pipe diameter on the outlet side. | 09-17-2015 |
20150260089 | DEVICE FOR COOLING AND PRESSURIZATION - A device for cooling and pressurization, which is composed of a charger, an outlet tube couples the mechanical charger, a first valve coupled to the charger outlet tube and a engine intake tube, a second valve coupled to the charger outlet tube and a core cooling tube, and a rotary engine body coupled to the engine intake tube and the core cooling tube. The device of the present invention has functions with cooling and/or pressurization, and manners of the engine intake and core heat dissipation intake can be used in the device to perform the core cooling by the serial, parallel or independent manner. | 09-17-2015 |
20150260090 | INTERNAL COOLING PASSAGE STRUCTURE FOR ROTARY ENGINE - An internal cooling passage structure for rotary engine, which includes a rotary engine body, having a front frame, a mid-frame, a rear frame and a rotor, wherein the rotor has cooling passages beneath the rotor triangular apexes, and both front and rear frames respectively have corresponding openings; a rotor, rotating in the mid-frame, having the core cooling passages in full or partial connection with the openings in both front and rear frames in the engine operation; and a guide vane along the opening edge, wherein external air is guided into the rotor core cooling passages by the guide vane which avoids generating heat vortices and helps to increase the cooling air so as to lower the temperature on the rotor and its assemblies. | 09-17-2015 |
20150260091 | EXTERNAL COOLING FIN FOR ROTARY ENGINE - An external cooling fin of a rotary engine is mounted onto the housings of the rotary engine and includes a plurality of cooling teeth for lowering the temperature of the rotary engine, and each cooling fin includes a root and two or more outstretching fin stems, and the root is coupled to the rotary engine housings, so as to achieve a high-efficiency heat dissipation. | 09-17-2015 |
Patent application number | Description | Published |
20130193539 | Method for Increasing Photodiode Full Well Capacity - A backside illuminated CMOS image sensor comprises an extended photo active region formed over a substrate using a first high energy ion implantation process and an isolation region formed over the substrate using a second high energy ion implantation process. The extended photo active region is enclosed by the isolation region, which has a same depth as the extended photo active region. The extended photo active region helps to increase the number of photons converted into electrons so as to improve quantum efficiency. | 08-01-2013 |
20130256893 | BONDING PAD STRUCTURE WITH DENSE VIA ARRAY - A bonding pad structure includes a substrate and a first conductive island formed in a first dielectric layer and disposed over the substrate. A first via array having a plurality of vias is formed in a second dielectric layer and disposed over the first conductive island. A second conductive island is formed in a third dielectric layer and disposed over the first via array. A bonding pad is disposed over the second conductive island. The first conductive island, the first via array, and the second conductive island are electrically connected to the bonding pad. The first via array is connected to no other conductive island in the first dielectric layer except the first conductive island. No other conductive island in the third dielectric layer is connected to the first via array except the second conductive island. | 10-03-2013 |
20150129940 | MECHANISM FOR FORMING GATE - Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a semiconductor substrate. The semiconductor device also includes an isolation structure in the semiconductor substrate and surrounding an active region of the semiconductor substrate. The semiconductor device includes a gate over the semiconductor substrate. The gate has an intermediate portion over the active region and two end portions connected to the intermediate portion. Each of the end portions has a first gate length longer than a second gate length of the intermediate portion and is located over the isolation structure. | 05-14-2015 |
20150129987 | MECHANISM FOR FORMING SEMICONDUCTOR DEVICE WITH GATE - Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and an isolation structure in the semiconductor substrate and surrounding an active region of the semiconductor substrate. The semiconductor device also includes a gate over the semiconductor substrate, and the gate has an intermediate portion over the active region and two end portions connected to the intermediate portion, and the end portions are over the isolation structure. The semiconductor device further includes a support film over the isolation structure and covering the isolation structure and at least one of the end portions of the gate. The support film exposes the active region and the intermediate portion of the gate. | 05-14-2015 |
20150137247 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor device includes a p-type metal oxide semiconductor device (PMOS) and an n-type metal oxide semiconductor device (NMOS) disposed over a substrate. The PMOS has a first gate structure located on the substrate, a carbon doped n-type well disposed under the first gate structure, a first channel region disposed in the carbon doped n-type well, and activated first source/drain regions disposed on opposite sides of the first channel region. The NMOS has a second gate structure located on the substrate, a carbon doped p-type well disposed under the second gate structure, a second channel region disposed in the carbon doped p-type well, and activated second source/drain regions disposed on opposite sides of the second channel region. | 05-21-2015 |
20150200299 | SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF - A semiconductor device and a method of fabricating the semiconductor device are provided. The semiconductor device includes a substrate; a source/drain region having a first dopant in the substrate; a barrier layer having a second dopant formed around the source/drain region in the substrate. When a semiconductor device is scaled down, the doped profile in source/drain regions might affect the threshold voltage uniformity, the provided semiconductor device may improve the threshold voltage uniformity by the barrier layer to control the doped profile. | 07-16-2015 |
20150206945 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor device includes a metal oxide semiconductor device disposed over a substrate and an interconnect plug. The metal oxide semiconductor device includes a gate structure located on the substrate and a raised source/drain region disposed adjacent to the gate structure. The raised source/drain region includes a top surface above a surface of the substrate by a distance. The interconnect plug connects to the raised source/drain region. The interconnect plug includes a doped region contacting the top surface of the raised source/drain region, a metal silicide region located on the doped region, and a metal region located on the metal silicide region. | 07-23-2015 |
20150214165 | BONDING PAD STRUCTURE WITH DENSE VIA ARRAY - A bonding pad structure comprises a first dielectric layer, a first conductive island in a second dielectric layer over the first dielectric layer and a via array having a plurality of vias in a third dielectric layer over the first conductive island. The structure also comprises a plurality of second conductive islands in a fourth dielectric layer over the via array. The second conductive islands are each separated from one another by a dielectric material of the fourth dielectric layer and in contact with at least one via of the via array. The structure further comprises a substrate over the second conductive islands. The substrate has an opening defined therein that exposes at least one second conductive island. The structure additionally comprises a bonding pad over the substrate. The bonding pad is in contact with the at least one second conductive island through the opening in the substrate. | 07-30-2015 |
Patent application number | Description | Published |
20140140681 | VIDEO CONTENT SEARCH METHOD, SYSTEM, AND DEVICE - In a video content search method, dialogue can be tracked and isolated by a keyword being inputted by a user and compared with subtitles of a stored video currently being played in a media player, and subtitles which match or contain the inputted keyword are output to a display device. A subtitle from the display of any matching subtitles can be selected by the user and the media player is controlled to jump a video frame currently being played to a single video frame associated with the selected subtitle. | 05-22-2014 |
20140164538 | ELECTRONIC DEVICE AND METHOD OF RECORDING AND OUTPUTTING MESSAGES - In a method of recording and outputting messages using an electronic device, a message is recorded using an input device and is stored into a storage device of the electronic device. When a person appears within a detection range of a detection device of the electronic device, the detection device identifies the person, and the message corresponding to the identified person is outputted using an output device of the electronic device. | 06-12-2014 |
20140181729 | ELECTRONIC DEVICE AND METHOD FOR EDITING WINDOWS - A display device of an electronic device displays a plurality of windows. When a user selects a window, the window is displayed above other windows. When the user inputs an editing signal and the editing signal corresponds to an association instruction, the window is associated with the association instruction. When the editing signal does not correspond to the association instruction or a canceling instruction, the window associated with the association instruction is edited according to the editing signal. | 06-26-2014 |
20140222942 | REMOTE CONTROL SYSTEM AND METHOD - A server remotely controls a remote computer. The server sends a monitoring program to the remote computer, wherein a remote control application is installed in the server and the remote computer. The server receives a request from the monitoring program installed in the remote computer that has an error. The server activates a remote control application in the server and the remote computer, and remotely controls the remote computer via the remote control application. | 08-07-2014 |
20140277610 | ELECTRONIC DEVICE AND METHOD FOR ADJUSTING FOOL-PROOFING FUNCTIONS OF OPERATIONS USING THE ELECTRONIC DEVICE - In a method for an electronic device to adjust fool-proofing functions of operations, an algorithm corresponding to each of the operations, and ranges for triggering the fool-proofing functions of the operations are preset. When an operation inputted by an operator is obtained, the method calculates a skilled value of the operation according to reference parameters of the operator and an algorithm corresponding to the operation. The method further determines a fool-proofing function of the operation that is triggered by the electronic device according to the skilled value and the ranges for triggering the fool-proofing functions, and adjusts the electronic device to execute the determined fool-proofing function. | 09-18-2014 |
20140304779 | DESKTOP SHARING SYSTEM AND METHOD - A server remotely share files in a desktop to one or more clients. The server assigns a meeting desktop to a client according to the assignment request, and receives login requests from other clients for logging in the meeting desktop. The server authorizes a control privilege to a shared client that needs to share files. The server receives the files from the shared client. Then the server opens and shares the files in the meeting desktop to share with all clients in the meeting desktop. | 10-09-2014 |
20140317418 | SERVER, CLIENT DEVICE, AND USB REDIRECTION METHOD - A client device obtains data from a universal serial bus (USB) device and compresses the data. The client device sends the compressed data to a server using a USB redirection. The server decompresses the compressed data and sends the decompressed data to a virtual machine installed in the server. The client device remotely accesses decompressed data when the decompressed data is stored into the virtual machine. | 10-23-2014 |
Patent application number | Description | Published |
20130241601 | High-side driver circuit - The present invention provides a high-side driver circuit including a power transistor, the first transistor, the second transistor, the second capacitor, the second diode, a start-up circuit. The start-up circuit is coupled between a resistor and the second capacitor to complete a gate driving circuit. And, the aforementioned resistor can either be the gate resistance of the power transistor or an external resistor. The design of start-up circuit enables the functionality of the bootstrap capacitor of being charged to a designate voltage level. Thus, the depletion-mode transistor can be controlled to turn on/off without a floating voltage source or a negative voltage source. | 09-19-2013 |
20130241603 | Current limit circuit apparatus - The present invention provides a current limit circuit apparatus, coupled with the gate of a GaN transistor. The current limit circuit comprises a diode, a first transistor, a second transistor, a first resistor, a second resistor, a third resistor and a fourth resistor. The source and the drain of the first transistor couple with the diode. The source of the second transistor couples with the gate of the first transistor. The source of the first transistor couples with the first transistor. The source of the second transistor couples with the second resistor. The third resistor couples with the fourth resistor and the gate of the first transistor. The first transistor turned off and the gate current is limited. When the current of the gate of the GaN transistor exceeds the predetermined value, the breakdown voltage is increased by limiting the gate current. | 09-19-2013 |
20150114470 | FLOW CONTROL DEVICE AND THE METHOD FOR CONTROLLING THE FLOW THEREOF - The flow control device is provided and the method for controlling the flow. A flow control device comprises: a body including a first end, opposite second end, a first flow channel and a second flow channel, a plug and a laminar flow layer accommodated in the second flow channel; a telescopic device accommodated the length of the telescopic device is adjustable, so as to control the flow of fluid flowing through the opening area in the body. | 04-30-2015 |
20150120131 | COMMUNICATION SYSTEM BETWEEN ELECTRIC BIKES AND COMMUNICATION METHOD THEREOF - The present invention provides a communication system between electric bikes and communication method thereof. The communication system comprises a plurality of electric bikes. Each of the electric bikes comprises a monitor module and a portable electric device, wherein the portable device further comprises a storing unit and a WiFi module. The monitor module is configured to monitor the status of the electric bike to generate a plurality of monitor information. When a temporary network is formed between the electric bikes, the electric bikes transmit the monitor information each other through the temporary network and each of the electric bikes stores the received monitor information. | 04-30-2015 |
Patent application number | Description | Published |
20140136599 | METHOD, SYSTEM AND COMPUTER READABLE STORAGE MEDIUM FOR NOTIFICATION AND PROVIDING QUICK LINK OF SHARED INFORMATION SYNCHRONIZED TO LOCATION - A method for notification and providing quick link of shared information synchronized to location includes the following steps. Shared information uploaded from one local client device is received. The shared information is synchronized and distributed to another local client device. A shortcut link containing a saving path for instantly activating the shared information synchronized in another local client device is provided and sent to the another local client device. | 05-15-2014 |
20140136635 | Method and System of Providing File-Related Social Network Interaction under Cloud Storage Service and Computer Readable Recording Medium Stored with the Method - The present invention provides a method of providing file-related social network interaction under cloud storage service, which comprises: (a) a cloud server synchronizes a plurality of share files transmitted from any local computer to synchronization file folders of all the other local computers; (b) the cloud server gathers all social network feedback messages from all the local computers and user accounts thereof; and (c) when a social network feedback ranking table is opened, the cloud server provides a plurality of latest social network feedback messages relative to the share files and names of the share files and the user accounts to the local computer, thereby allowing the social network feedback ranking table to be made. | 05-15-2014 |
20140333435 | METHOD AND SYSTEM FOR REMINDING READER OF FATIGUE IN READING WHILE USING ELECTRONIC DEVICE - The method and system for reminding readers of fatigue in reading while using electronic devices are revealed. First use a reading speed calculation module to detect user's reading speed within a period of time when the user is using an electronic with a display to read. The reading speed is related to pages being turned or the amount of words being read. Then a fatigue-in-reading reminder module is activated by the reading speed calculation module when the user's reading speed falls within a specific range so as to remind the user by pop-up windows, sounds, flash light or vibration at the proper time and provide the user certain corresponding measures he/she should take. Thereby there is no need to use additional equipment for preventing users from becoming more fatigue and healthy vision is accomplished at lower cost with higher efficiency. | 11-13-2014 |
20150019376 | SYSTEM AND METHOD FOR USING TRUSTED DEVICE TO BROWSE E-BOOK - The invention relates to a system and a method for using a trusted device to browse e-books. The system comprises an author end, a user end, an electronic bookstore unit, and a data storage unit. In the cloud system, an e-book author can set the authorization mechanism about e-book sale and downloading to protect their copyrights and to upload the e-book by the electronic bookstore unit. The user also can browse e-books by assigned electronic apparatuses to protect purchase rights from being illegally copied. The e-book is an encrypted file, so the user has to use the identification code of the certified electronic apparatus as a decrypted key to decrypt the e-book file for reading. | 01-15-2015 |
20150032811 | INTEGRATION APPARATUS AND INTEGRATION METHOD THEREOF FOR INTEGRATING CALENDAR SYSTEM AND CLOUD STORAGE SYSTEM - An integration apparatus and an integration method, an integration program thereof for integrating a calendar system and a cloud storage system are provided. The integration apparatus includes a network interface, a storage medium and a processor. The network interface is connected to a network. The storage medium stores an integration program. The processor is electrically connected to the network interface and the storage medium, and it is configured to run the integration program to execute the integration method to integrate the calendar and cloud storage systems together. | 01-29-2015 |
20150039759 | APPARATUS, METHOD, AND NON-TRANSITORY COMPUTER READABLE STORAGE MEDIUM THEREOF FOR CONTROLLING ACCESS OF A RESOURCE - Apparatus and method for controlling access of a resource and non-transitory computer readable storage medium thereof are provided. The apparatus includes a storage unit, an interface, and a processing unit, wherein the processing unit is electrically connected to the storage unit and the interface. The interface is configured to receive a request for generating a share link regarding the resource or a snapshotted version of the resource for a temporary account. The processing unit is configured to create the share link according to the temporary account and a permission setting of the temporary account and store the temporary account, the permission setting, and the share link in the storage unit. The share link and a permanent link of the resource are different. The interface is further configured to deliver the share link to the temporary account. | 02-05-2015 |
20150089612 | CLOUD STORAGE SERVER AND MANAGEMENT METHOD THEREOF - A cloud storage server and a management method thereof are provided. The cloud storage server runs a management program for managing and sharing a plurality of resources. When a user wants to share a resource stored in the cloud storage server to a target address, the cloud storage server creates a share link of the shared resource and delivers the share link to a target address. After the user receives the share link from the target address, the user can set his own password for accessing the cloud storage server via the share link and download the shared resource. | 03-26-2015 |
20150134405 | PERSONAL SERVICE PROVIDING SYSTEM, INFORMATION COLLECTION AND ANALYSIS SERVER, AND METHODS THEREOF - A personal service providing system, an information collection and analysis server and the methods thereof are provided. The information collection and analysis server receives a record of a transaction from a service end, generates a distinct link associated with the record, and transmits the distinct link to the service end. The service end generates a machine-readable code by embedding the distinct link therein. A user device obtains the distinct link from the machine-readable code and transmits an identity to the information collection and analysis server through the distinct link. The information collection and analysis server receives the identity from the user device and associates the identity with the record according to the distinct link. | 05-14-2015 |
20150156207 | NETWORK SERVICE SYSTEM AND NETWORK SERVICE UTILIZING METHOD THEREOF - A network service system and a network service utilizing method thereof are provided. The network service system includes a network service providing apparatus and a network service using apparatus. The network service providing apparatus provides a machine-readable code. The network service using apparatus parses the machine-readable code to obtain an identification and a key. The network service providing apparatus transmits an encrypted message to the network service using apparatus based on the identification. The network service using apparatus decrypts the encrypted message into service information by the key and uses a service of the network service providing apparatus after connecting to the network service providing apparatus according to the service information. | 06-04-2015 |
20150347448 | SECURE SYNCHRONIZATION APPARATUS, METHOD, AND NON-TRANSITORY COMPUTER READABLE STORAGE MEDIUM THEREOF - A secure synchronization apparatus, method, and non-transitory computer readable storage medium thereof are provided. The secure synchronization apparatus of the present invention includes a storage unit, an interface, and a processing unit. The interface is electrically connected to a storage server via a network. The processing unit is electrically connected to the storage unit and the interface. The processing unit is configured to execute an operating system and execute an agent program installed on the operating system. The agent program configures an isolated space, manages an extended space within the storage unit, and synchronizes an object between the isolated space, extended space, and the storage server through the interface. The isolated space and the extended space are only recognized by the agent program installed on the operating system and the object in the two spaces is accessible only via the agent program. | 12-03-2015 |
20150355853 | SYNCHRONIZATION APPARATUS, METHOD, AND NON-TRANSITORY COMPUTER READABLE STORAGE MEDIUM - A context-awareness synchronization apparatus, method, and non-transitory computer readable storage medium are provided. The synchronization apparatus is electrically connected to a storage server via a network. The synchronization apparatus executes an operating system and an agent program installed on the operating system. The agent program configures a first and second individual spaces within the synchronization apparatus, determines a context of the synchronization apparatus, selects a first and second policy sets from a plurality of policy sets for the first and second individual spaces according to the context respectively, and handles the first and second individual spaces according to the first and second policy sets respectively. The first and second individual spaces are unaware of each other and only recognized by the agent program installed on the operating system. Each of the first and second policy sets includes a rule regarding synchronization between an individual space and the storage server. | 12-10-2015 |