| Patent application number | Description | Published |
|---|
| 20080215917 | Synchronizing Cross Checked Processors During Initialization by Miscompare - A few inexpensive hardware facilities are incorporated in a tightly synchronized cross checked design. These facilities allow initialization software to quickly bring the two processors to the same state by rapid, repeated resets and execution of the initialization software. The resets are done in a way as to be transparent to the rest of the system and to the end user. | 09-04-2008 |
| 20090213857 | METHOD, SYSTEM, COMPUTER PROGRAM PRODUCT, AND HARDWARE PRODUCT FOR ETHERNET VIRTUALIZATION USING AN ELASTIC FIFO MEMORY TO FACILITATE FLOW OF BROADCAST TRAFFIC TO VIRTUAL HOSTS - A packet that represents unknown traffic for a virtual host is received. A test is performed to ascertain whether or not a destination connection can be determined for the received packet wherein it is discovered the packet is a broadcast (or multicast) packet. Since such packets have multiple destinations in a virtualized environment, the broadcast (or multicast) packet requires special handling and is passed to a store engine. The store engine obtains a free packet buffer from an elastic FIFO memory, moves the packet into the free packet buffer, and submits the free packet buffer back to the elastic FIFO memory. An assist engine determines and assigns connections to packets submitted to the elastic FIFO without known connections, such as broadcast (or multicast) packets. The assist engine efficiently performs this task through the use of indirect buffers, which are also obtained from and submitted back to the elastic FIFO. A monitoring engine detects both an availability of connection-specific resources and a presence of one or more waiting packets, within the elastic FIFO, with a known destination connection. When both are detected, said monitoring engine removes a packet from the elastic FIFO and passes it to an allocating engine. The allocating engine allocates the one or more connection-specific resources required to send the packet to the virtual host memory corresponding to the connection destination, then passes the packet to a sending engine which writes the packet to the virtual host memory. | 08-27-2009 |
| 20090213864 | INBOUND BLOCKING OF DATA RECEIVED FROM A LAN IN A MULTI-PROCESSOR VIRTUALIZATION ENVIRONMENT - An incoming LAN traffic management system comprising: an I/O adapter configured to receive incoming packets from an Ethernet; a plurality of hosts coupled to the I/O adapter and each having a host buffer; a data router configured to block information received by the I/O adapter into memory locations from an SBAL associated with at least one of the plurality of hosts and in accordance with blocking parameters for the at least one of the plurality of hosts, the data router including an expiration engine configured to expire the SBAL before it is full if at least one predetermined threshold is exceeded. | 08-27-2009 |
| 20090238190 | Ethernet Virtualization Using a Network Packet Alteration - A method of Ethernet virtualization using network packet alteration. The method comprises receiving network packets from a host destined for transmission over a network, checking whether the network packets have headers, if the packets do not have headers, forming a first portion of the header using firmware, storing the formed packet and header to a first memory; and forming a second portion of the header using programmable logic. | 09-24-2009 |
| 20090238197 | Ethernet Virtualization Using Assisted Frame Correction - A method for Ethernet virtualization using assisted frame correction. The method comprises receiving at a host adapter data packets from a network, storing the received data packets in host memory, storing the received data packets in a hardware queue located on the host adapter, setting a status indicator reflecting the status of the data packets based on results of the checking, and sending the status indicator to the host memory. | 09-24-2009 |
| 20090240346 | Ethernet Virtualization Using Hardware Control Flow Override - A method of Ethernet virtualization using hardware control flow override. The method comprises providing, at a first logical entity of a first programmable logic device, control signals used for performing control-flow, selectively routing the control signals to a second programmable logic device that is external to the first programmable logic device, receiving processed control signals from the second programmable logic device, and forwarding the processed control signals to a second logic entity of the first programmable logic device. | 09-24-2009 |
| 20090240788 | Ethernet Virtualization Using Automatic Self-Configuration of Logic - A method of Ethernet virtualization using automatic self-configuration of logic of a data router. The method comprising maintaining control parameters at a master device, accessing, by a slave device, the control parameters at the master devices, and configuring the slave device based on the accessed control parameters. | 09-24-2009 |
