| Patent application number | Description | Published |
|---|
| 20080238446 | High temperature microelectromechanical (MEM) devices - A microelectromechanical (MEM) device per the present invention comprises a semiconductor wafer—typically an SOI wafer, a substrate, and a high temperature bond which bonds the wafer to the substrate to form a composite structure. Portions of the composite structure are patterned and etched to define stationary and movable MEM elements, with the movable elements being mechanically coupled to the stationary elements. The high temperature bond is preferably a mechanical bond, with the wafer and substrate having respective bonding pads which are aligned and mechanically connected to form a thermocompression bond to effect the bonding. A metallization layer is typically deposited on the composite structure and patterned to provide electrical interconnections for the device. The metallization layer preferably comprises a conductive refractory material such as platinum to withstand high temperature environments. | 10-02-2008 |
| 20080241932 | Analyte detection via electrochemically generated reagent - Electrochemical devices, methods, and systems for detecting and quantifying analytes are disclosed. A chemical detection reagent is locally generated in a test solution by electrochemical reaction of a precursor compound caused to migrate into the test solution from a precursor solution separated from the test solution by a cell separator. This approach provides precise metering of the reagent, via the charge passed, and avoids the need to store a reagent solution that may be chemically unstable. In one embodiment, the starch concentration in a colloidal solution can be measured via spectroscopic detection of a blue complex formed by the interaction of starch with iodine produced, on demand, by electrochemical oxidation of iodide ion. The approach may also be used to characterize certain types of analytes. The invention is amenable to automation and is particularly useful for on-line monitoring of production processes, including the inclusion of feed back loop mechanisms for process control. | 10-02-2008 |
| 20080267232 | Micro-Structured Optic Apparatus - A micro-structured optics apparatus includes a concave microlens to expand a beam of light, a reflector to provide a first reflection of at least a portion of the beam of light and a micro-Fresnel lens to collimate the at least a portion of the beam of light after the expansion. | 10-30-2008 |
| 20080272499 | Through-wafer vias - A through-wafer via interconnect region is in a circuit portion of a wafer, the circuit portion including at least one electrically conducting metal layer and configured for use, after dicing of the wafer, as one of a plurality of layers stacked vertically to form a three dimensional integrated circuit. Within the metal layer in the circuit portion, the metal is removably distributed such that the ratio of metal to nonmetal area, within the via region, varies by less than a predetermined amount from the ratio of metal to nonmetal area outside the via region. | 11-06-2008 |
| 20090095077 | DISC RESONATOR GYROSCOPE WITH IMPROVED FREQUENCY COINCIDENCE AND METHOD OF MANUFACTURE - A disc resonator gyroscope (DRG) and method of manufacture. The DRG has a surrounding pattern of bond metal having a symmetry related to the symmetry of a resonator device wafer that enables more even dissipation of heat from a resonator device wafer of the DRG during an etching operation. The metal bond frame eliminates or substantially reduces the thermal asymmetry that the resonator device wafer normally experiences when a conventional, square bond frame is used, which in turn can cause geometric asymmetry in the widths of the beams that are etched into the resonator device wafer of the DRG. | 04-16-2009 |
| 20100001378 | Through-substrate vias and method of fabricating same - An through-substrate via fabrication method requires forming a through-substrate via hole in a semiconductor substrate, depositing an electrically insulating, continuous and substantially conformal isolation material onto the substrate and interior walls of the via using ALD, and depositing a conductive material into the via and over the isolation material using ALD such that it is electrically continuous across the length of the via hole. The isolation material may be prepared by activating it with a seed layer deposited by ALD. The via hole is preferably formed by dry etching first and second cavities having respective diameters into the substrate's top and bottom surfaces, respectively, to form a single continuous aperture through the substrate. The present method may be practiced at temperatures of less than 200° C. The basic fabrication method may be extended to provide vias with multiple conductive layers, such as coaxial and triaxial vias. | 01-07-2010 |
| 20100095739 | METHOD FOR ADJUSTING RESONANCE FREQUENCIES OF A VIBRATING MICROELECTROMECHANICAL DEVICE - The present invention relates to a method for adjusting the resonant frequencies of a vibrating microelectromechanical (MEMS) device. In one embodiment, the present invention is a method for adjusting the resonant frequencies of a vibrating mass including the steps of patterning a surface of a device layer of the vibrating mass with a mask, etching the vibrating mass to define a structure of the vibrating mass, determining a first set of resonant frequencies of the vibrating mass, determining a mass removal amount of the vibrating mass and a mass removal location of the vibrating mass to obtain a second set of resonant frequencies of the vibrating mass, removing the mask at the mass removal location, and etching the vibrating mass to remove the mass removal amount of the vibrating mass at the mass removal location of the vibrating mass. | 04-22-2010 |
| 20100110607 | Vertical capacitors and method of fabricating same - A fabrication method which forms vertical capacitors in a substrate. The method is preferably an all-dry process, comprising forming a through-substrate via hole in the substrate, depositing a first conductive material layer into the via hole using atomic layer deposition (ALD) such that it is electrically continuous across the length of the via hole, depositing an electrically insulating, continuous and substantially conformal isolation material layer over the first conductive layer using ALD, and depositing a second conductive material layer over the isolation material layer using ALD such that it is electrically continuous across the length of the via hole. The layers are arranged such that they form a vertical capacitor. The present method may be successfully practiced at temperatures of less than 200° C., thereby avoiding damage to circuitry residing on the substrate that might otherwise occur. | 05-06-2010 |
| 20100127346 | POWER DISTRIBUTION FOR CMOS CIRCUITS USING IN-SUBSTRATE DECOUPLING CAPACITORS AND BACK SIDE METAL LAYERS - A semiconductor device and method for fabricating the same is provided. The semiconductor device includes a substrate, at least one capacitor, an active circuit and a power plane. The substrate has a first cavity formed through a first surface to a first depth and a second cavity formed through a second surface to a second depth. The first and second cavities forming a via hole through the substrate. The at least one capacitor includes a first conductive material layer deposited in the via hole, a first isolation material layer deposited over the first conductive material layer, and a second conductive material layer deposited over the first isolation material layer. The active circuit adjacent the first surface and electrically coupled to the at least one capacitor, and the power plane adjacent the second surface and electrically coupled to the at least one capacitor to provide power conditioning to the active circuit. | 05-27-2010 |
| 20100151625 | BURIED VIA TECHNOLOGY FOR THREE DIMENSIONAL INTEGRATED CIRCUITS - A three dimensional integrated circuit and method for making the same. The three dimensional integrated circuit has a first and a second active circuit layers with a first metal layer and a second metal layer, respectively. The metal layers are connected by metal inside a buried via. The fabrication method includes etching a via in the first active circuit layer to expose the first metal layer without penetrating the first metal layer, depositing metal inside the via, the metal inside the via being in contact with the first metal layer, and bonding the second active circuit layer to the first active circuit layer using a metal bond that connects the metal inside the via to the second metal layer of the second active circuit layer. | 06-17-2010 |
| 20100207229 | NON-PLANAR MICROCIRCUIT STRUCTURE AND METHOD OF FABRICATING SAME - A foldable microcircuit is initially a planar semiconductor wafer on which circuitry has been formed. The wafer is segmented into a plurality of tiles, and a plurality of hinge mechanisms are coupled between adjacent pairs of tiles such that the segmented wafer can be folded into a desired non-planar configuration having a high fill-factor and small gaps between tiles. The hinge mechanisms can comprise an organic material deposited on the wafer such that it provides mechanical coupling between adjacent tiles, with metal interconnections between tiles formed directly over the organic hinges, or routed between adjacent tiles via compliant bridges. Alternatively, the interconnection traces between tiles can serve as part or all of a hinge mechanism. The foldable microcircuit can be, for example, a CMOS circuit, with the segmented tiles folded to form, for example, a semi-spherical structure arranged to provide a wide FOV photodetector array. | 08-19-2010 |
| 20100225436 | MICROFABRICATED INDUCTORS WITH THROUGH-WAFER VIAS - The present invention relates to microfabricated inductors with through-wafer vias. In one embodiment, the present invention is an inductor including a first wafer, a first plurality of metal fillings located within the first wafer, and a first plurality of metal conductors connecting the first plurality of metal fillings together to form a first spiral with a first plurality of windings. In another embodiment, the present invention is a method for producing an inductor including the steps of forming a first plurality of vias in a first substrate, filling the first plurality of vias in the first substrate with a first plurality of metal fillings, forming a first plurality of metal conductors, and connecting pairs of the first plurality of metal fillings together using the first plurality of metal conductors to form a spiral. | 09-09-2010 |
| 20110056831 | MICROFABRICATED LIQUID JUNCTION REFERENCE ELECTRODE - A microfabricated liquid junction reference electrode that can be integrated with microfabricated chemical or electrical sensors, which electrode is an M/MX type reference electrode comprised of a metal and a metal salt, as well as a X | 03-10-2011 |
| 20110121427 | THROUGH-SUBSTRATE VIAS WITH POLYMER FILL AND METHOD OF FABRICATING SAME - An through-substrate via fabrication method requires forming a through-substrate via hole in a semiconductor substrate, depositing an electrically insulating, continuous and substantially conformal isolation material onto the substrate and interior walls of the via using ALD, depositing a conductive material into the via and over the isolation material using ALD such that it is electrically continuous across the length of the via hole, and depositing a polymer material over the conductive material such that any continuous top-to-bottom openings present in the via holes are filled by the polymer material. The basic fabrication method may be extended to provide vias with multiple conductive layers, such as coaxial and triaxial vias. | 05-26-2011 |
| 20110131798 | MICROFABRICATED INDUCTORS WITH THROUGH-WAFER VIAS - The present invention relates to microfabricated inductors with through-wafer vias. In one embodiment, the present invention is an inductor including a first wafer, a first plurality of metal fillings located within the first wafer, and a first plurality of metal conductors connecting the first plurality of metal fillings together to form a first spiral with a first plurality of windings. In another embodiment, the present invention is a method for producing an inductor including the steps of forming a first plurality of vias in a first substrate, filling the first plurality of vias in the first substrate with a first plurality of metal fillings, forming a first plurality of metal conductors, and connecting pairs of the first plurality of metal fillings together using the first plurality of metal conductors to form a spiral. | 06-09-2011 |
| 20110147367 | SYSTEM FOR HEATING A VAPOR CELL - A vapor cell includes an interrogation cell in a substrate, the interrogation cell having an entrance window and an exit window, and a first transparent thin-film heater in thermal communication with the entrance window. The transparent thin-film heater has a first layer in communication with a first pole contact at a proximal end of the heater and a layer coupler contact at a distal end, a second layer in communication with a second pole contact at the proximal end, and the second layer electrically coupled to the layer coupler contact at the distal end. An insulating layer is sandwiched between the first and second layers. The insulating layer has an opening at the distal end to admit the layer coupler contact and to insulate the remainder of the second layer from the first layer. The first and second pole contacts are available to complete an electric circuit at the proximal end, with magnetic fields for each of the first and second layers oriented in opposing directions when a current is applied through the circuit. | 06-23-2011 |
