Patent application number | Description | Published |
20080219400 | Event Counter - A counting method and a counter using an integrated circuit memory area, including at least one step of storage of partial values in several words of identical memory sizes, the result of the counting being obtained by arithmetically adding the values contained in the different words. | 09-11-2008 |
20100017553 | INTERFACE BETWEEN A TWIN-WIRE BUS AND A SINGLE-WIRE BUS - A method and a device for converting a first bus including at least a data wire and a clock wire into a single-wire bus, wherein a data bit of the first bus is converted on half a period of the clock signal for transmission over the second bus, a waiting pattern being placed on the second bus during the other half-period. | 01-21-2010 |
20100325320 | VERIFICATION OF DATA READ IN MEMORY - A method and a circuit for checking data transferred between a circuit and a processing unit, in which: the data originating from the circuit transit through a first buffer element having a size which is a multiple of the size of data to be subsequently delivered over a bus of the processing unit; an address provided by the processing unit for the circuit is temporarily stored in a second element; and the content of the first element is compared with current data originating from the circuit, at least when they correspond to an address of data already present in this first element. | 12-23-2010 |
20110007567 | TEMPORARY LOCKING OF AN ELECTRONIC CIRCUIT - A method and a circuit for protecting at least one piece of information contained in an electronic circuit by disabling at least one function of the circuit in case of detection of a number of abnormal operations greater than a threshold, in which the disabling of the function is temporary, of a duration independent from whether the circuit is powered or not. | 01-13-2011 |
20110010775 | PROTECTION OF INFORMATION CONTAINED IN AN ELECTRONIC CIRCUIT - A method and a circuit for protecting data contained in an electronic circuit against a disturbance of its operation, in which a detection of a disturbance conditions the incrementing or the decrementing of a counter over at least one bit, the counter being automatically reset at the end of a time period independent from the fact that the circuit is or not powered. | 01-13-2011 |
20110038481 | HIERARCHIZATION OF CRYTOGRAPHIC KEYS IN AN ELECTRONIC CIRCUIT - A method of obtaining, in an electronic circuit, at least one first key intended to be used in a cryptographic mechanism, on the basis of at least one second key contained in the same circuit, the first key being stored in at least one first storage element of the circuit, the first storage element being reinitialized automatically after a duration independent of the fact that the circuit is or is not powered. Also described are applications of this method to encrypted transmissions, usage controls, as well as an electronic circuit implementing these methods. | 02-17-2011 |
20110122694 | LIMITATION OF THE ACCESS TO A RESOURCE OF AN ELECTRONIC CIRCUIT - A method and a circuit for controlling the access to at least one resource of an electronic circuit, in which a test of the value of a counter over at least one bit conditions the access to the resource, the counter being automatically reset after a time period independent from whether the circuit is powered or not. | 05-26-2011 |
20120261594 | DEVICE FOR DISTURBING THE OPERATION OF AN INTEGRATED CIRCUIT - A system for injecting faults by laser beams into an electronic circuit including: at least two lasers capable of emitting approximately parallel beams; at least one optical system receiving, on the magnifying side, the beams; and a support of the integrated circuit placed on the reducing side of the optical system. | 10-18-2012 |
20130028369 | NON-VOLATILE MEMORY COUNTER - A counter in a non-volatile memory including at least two sub-counters, each counting with a different modulo, an increment of the counter being transferred on a single one of the sub-counters and the sub-counters being incremented sequentially. | 01-31-2013 |
20130077781 | METHOD OF KEY DERIVATION IN AN INTEGRATED CIRCUIT - A method of derivation, by an electronic circuit, of a first key from a second key, wherein: at least one third key is derived from the second key and is used to derive the first key; and a value of a counter, representative of the number of first keys, conditions the derivation of a new value of the third key. | 03-28-2013 |
20130159791 | METHOD AND DEVICE FOR FAULT DETECTION - The disclosure concerns a method implemented by a processing device. The method includes performing a first execution by the processing device of a computing function based on one or more initial parameters stored in a first memory device. The execution of the computing function generates one or more modified values of at least one of the initial parameters, wherein during the first execution the one or more initial parameters are read from the first memory device and the one or more modified values are stored in a second memory device. The method also includes performing a second execution by the processing device of the computing function based on the one or more initial parameters stored in the first memory device. | 06-20-2013 |
20140093026 | NON-VOLATILE MEMORY COUNTER - A counter in a non-volatile memory including at least two sub-counters, each counting with a different modulo, an increment of the counter being transferred on a single one of the sub-counters and the sub-counters being incremented sequentially. | 04-03-2014 |