Patent application number | Description | Published |
20080211940 | Image pixel employing floating base readout concept, and image sensor and image sensor array including the image pixel - A pixel of an image sensor includes only two signal lines per pixel, a pinned photodiode for sensing light, a floating base bipolar transistor, and no reset and address transistors. The floating base bipolar transistor provides the pixel with a gain, which can increase pixel sensitivity and reduce noise. The pixel also incorporates a vertical blooming control structure for an efficient blooming suppression. The output terminals of the pixel are coupled to a common column output line terminated by a special current sensing correlated double sampling circuit, which is used for subtraction of emitter leakage current. Based on this structure, the pixel has high sensitivity, high response uniformity, low noise, reduced size, and efficient layout. | 09-04-2008 |
20080283885 | Small pixel for CMOS image sensors with vertically integrated set and reset diodes - A pixel of an image sensor, the pixel includes a floating diffusion node to sense photo-generated charge, a reset diode to reset the floating diffusion node in response to a reset signal, and a set diode to set the floating diffusion node. | 11-20-2008 |
20080283886 | Small pixel for image sensors with JFET and vertically integrated reset diode - A pixel and a pixel array of an image sensor device of the present invention have small pixel sizes by resetting sensed charge using a diode built vertically above a substrate. The pixel and the pixel array also have low noise performance by using a JFET as a source follower transistor for sensing charge. The pixel includes a floating diffusion node configured to sense photo-generated charge, a reset diode configured to reset the floating diffusion node in response to a reset signal, and a junction field effect transistor configured to output a signal having an output voltage level corresponding to a charge level of the floating diffusion node. | 11-20-2008 |
20080296630 | CMOS image sensor and pixel of the same - A pixel of an image sensor includes a gate insulation layer formed over a substrate doped with first-type impurities, a transfer gate formed over the gate insulation layer, a photodiode formed in the substrate at one side of the transfer gate, and a floating diffusion node formed in the substrate at the other side of the transfer gate, wherein the transfer gate has a negative bias during a charge integration cycle. | 12-04-2008 |
20090207294 | METHOD AND APPARATUS FOR IMPROVING SENSITIVITY IN VERTICAL COLOR CMOS IMAGE SENSORS - The invention describes in detail the structure of a CMOS image sensor pixel that senses color of impinging light without having absorbing filters placed on its surface. The color sensing is accomplished by having a vertical stack of three-charge detection nodes placed in the silicon bulk, which collect electrons depending on the depth of their generation. The small charge detection node capacitance and thus high sensitivity with low noise is achieved by using fully depleted, potential well forming, buried layers instead of undepleted junction electrodes. Two embodiments of contacting the buried layers without substantially increasing the node capacitances are presented. | 08-20-2009 |
20100033610 | CMOS IMAGE SENSOR WITH IMPROVED PERFORMANCE INCORPORATING PIXELS WITH BURST RESET OPERATION - A reset transistor includes a floating diffusion region for detecting a charge, a junction region for draining the charge, a gate for controlling a transfer of the charge from the floating diffusion region to the junction region upon receipt of a reset signal, and a potential well incorporated underneath the gate. | 02-11-2010 |
20100044812 | STRATIFIED PHOTODIODE FOR HIGH RESOLUTION CMOS IMAGE SENSOR IMPLEMENTED WITH STI TECHNOLOGY - A stratified photodiode for high resolution CMOS image sensors implemented with STI technology is provided. The photodiode includes a semi-conductive layer of a first conductivity type, multiple doping regions of a second conductivity type, multiple doping regions of the first conductivity type, and a pinning layer. The multiple doping regions of the second conductivity type are formed to different depths in the semi-conductive layer. The multiple doping regions of the first conductivity type are disposed between the multiple doping regions of the second conductivity type and form multiple junction capacitances without full depletion. In particular, the stratified doping arrangement allows the photodiode to have a small size, high charge storage capacity, low dark current, and low operation voltages. | 02-25-2010 |
20100044824 | STRATIFIED PHOTODIODE FOR HIGH RESOLUTION CMOS IMAGE SENSOR IMPLEMENTED WITH STI TECHNOLOGY - A stratified photodiode for high resolution CMOS image sensors implemented with STI technology is provided. The photodiode includes a semi-conductive layer of a first conductivity type, multiple doping regions of a second conductivity type, multiple doping regions of the first conductivity type, and a pinning layer. The multiple doping regions of the second conductivity type are formed to different depths in the semi-conductive layer. The multiple doping regions of the first conductivity type are disposed between the multiple doping regions of the second conductivity type and form multiple junction capacitances without full depletion. In particular, the stratified doping arrangement allows the photodiode to have a small size, high charge storage capacity, low dark current, and low operation voltages. | 02-25-2010 |
20100171157 | IMAGE SENSOR WITH COMPACT PIXEL LAYOUT - Solid-state image sensors, specifically image sensor pixels, which have three or four transistors, high sensitivity, low noise, and low dark current, are provided. The pixels have separate active regions for active components, row-shared photodiodes and may also contain a capacitor to adjust the sensitivity, signal-to-noise ratio and dynamic range. The low dark current is achieved by using pinned photodiodes. | 07-08-2010 |
20100224947 | STACKED PIXEL FOR HIGH RESOLUTION CMOS IMAGE SENSOR - Provided is a solid-state CMOS image sensor, specifically a CMOS image sensor pixel that has stacked photo-sites, high sensitivity, and low dark current. In an image sensor including an array of pixels, each pixel includes: a standard photo-sensing and charge storage region formed in a first region under a surface portion of a substrate and collecting photo-generated carriers; a second charge storage region formed adjacent to the surface portion of the substrate and separated from the standard photo-sensing and charge storage region; and a potential barrier formed between the first region and a second region underneath the first region and diverting the photo-generated carriers from the second region to the second charge storage region. | 09-09-2010 |
20110177646 | IMAGE SENSOR WITH IMPROVED COLOR CROSSTALK - An image sensor comprises a substrate of a first conductivity type. First and second pixels are arrayed over the substrate. A potential barrier is formed in a region of the substrate corresponding to the first pixel but not in a region of the substrate corresponding to the second pixel. The second pixel is responsive to a color having a wavelength longer than the color to which the first pixel is responsive. The potential barrier is doped with dopants by a high energy ion implantation dopants or by an ion implantation or diffusion during epitaxial growth of the P-type epitaxial layer. | 07-21-2011 |
20110192959 | SMALL PIXEL FOR CMOS IMAGE SENSORS WITH VERTICALLY INTEGRATED SET AND RESET DIODES - A pixel of an image sensor, the pixel includes a floating diffusion. | 08-11-2011 |
20110205417 | METHOD AND IMAGE SENSOR PIXEL WITHOUT ADDRESS TRANSISTOR - The invention describes in detail a solid-state CMOS image sensor, specifically the CMOS image sensor pixel that has only two row lines per pixel, pinned photodiode for sensing light, and one or two column lines. The pixel does not have an address transistor and the sensing and reset transistors are both MOS p-channel type. This architecture results in a low noise operation with a very small output transistor random noise. In addition this new pixel architecture allows for the standard CDS signal processing operation, which reduces the pixel to pixel non-uniformities and minimizes kTC reset noise. The pixel has high sensitivity, high conversion gain, high response uniformity, and low noise, which is enabled by the efficient 3T pixel layout. | 08-25-2011 |
20110249158 | IMAGE SENSOR PIXELS WITH VERTICAL CHARGE TRANSFER - Image sensors having image sensor pixels with stacked photodiodes are provided. An image sensor pixel may include a shallow potential well located in a shallow implant region and a deep potential well located in a deep implant region. The shallow implant region and the deep implant region may be separated by a potential barrier. The image sensor pixel may have a given transfer gate to transfer charge from the shallow well to a floating diffusion node. The image sensor pixel may have an additional transfer gate to transfer charge from the deep well to the shallow well via a vertical transfer region located under the additional transfer gate. Image sensor pixels formed using this structure may exhibit higher pixel densities, higher image resolution, and higher sensitivity. | 10-13-2011 |
20120007157 | IMAGE SENSOR WITH COMPACT PIXEL LAYOUT - Solid-state image sensors, specifically image sensor pixels, which have three or four transistors, high sensitivity, low noise, and low dark current, are provided. The pixels have separate active regions for active components, row-shared photodiodes and may also contain a capacitor to adjust the sensitivity, signal-to-noise ratio and dynamic range. The low dark current is achieved by using pinned photodiodes. | 01-12-2012 |
20120175497 | IMAGE SENSOR PIXELS WITH BACK-GATE-MODULATED VERTICAL TRANSISTOR - Image sensor arrays may include image sensor pixels each having at least one back-gate-modulated vertical transistor. The back-gate-modulated vertical transistor may be used as a source follower amplifier. An image sensor pixel need not include an address transistor. The image sensor pixel with the back-gate-modulated vertical source follower transistor may exhibit high fill factor, large charge storage capacity, and has as few as two row control lines and two column control lines per pixel. This can be accomplished without pixel circuit sharing. The pixel may also provide direct photo-current sensing capabilities. The ability to directly sense photo-current may facilitate fast adjustment of sensor integration time. Fast adjustment of sensor integration time may be advantageous in automotive and endoscopic applications in which the time available for the correction of integration time is limited. | 07-12-2012 |
20120181417 | METHOD AND IMAGE SENSOR WITH EXTENDED PIXEL DYNAMIC RANGE INCORPORATING TRANSFER GATE WITH POTENTIAL WELL - A charge transfer transistor includes: a first diffusion region and a second diffusion region; a gate for controlling a charge transfer from the first diffusion region to the second diffusion region by a control signal; and a potential well incorporated under the gate, wherein the first diffusion region is a pinned photodiode. A pixel of an image sensor includes: a photodiode for generating and collecting a photo generated charge; a floating diffusion region for serving as a photo generated charge sensing node; a transfer gate for controlling a charge transfer from the photodiode to the floating diffusion region by a control signal; and a potential well incorporated under the transfer gate. | 07-19-2012 |
20120181581 | Back-Side-Illuminated Image Sensors with Bulk-Charge-Modulated Image Sensor Pixels - Image sensor arrays may include bulk-charge-modulated-device (BCMD) sensor pixels. The BCMD sensor pixels may be used in back-side-illuminated (BSI) image sensors. A BCMD sensor pixel need not include a dedicated addressing transistor. The BCMD sensor pixel may include a gated drain reset (GDR) structure that is used to perform reset operations. The GDR structure may be shared among multiple pixels, which provides increased charge storage capacity for high resolution image sensors. A negative back body bias may be applied to the BCMD pixel array, allowing the depletion region under each BCMD pixel to extend all the way to the back silicon surface. Extending the depletion region by negatively biasing the back silicon surface may serve to minimize pixel crosstalk. | 07-19-2012 |
20120205765 | IMAGE SENSORS WITH STACKED PHOTO-DIODES - This describes color filter arrangements for image sensor arrays that are formed using image sensor pixels with stacked photo-diodes. The stacked photo-diodes may include first and second photo-diodes and may have the ability to separate color signal according to the depth of carrier generation in a silicon substrate. A single color filter may be formed over the stacked photo-diodes to provide full red-green-blue sensing capability. Charge drain regions may also be formed at different depths in the silicon substrate. If the charge drain regions are formed beneath the stacked photo-diodes in the substrate, full red-green-blue color sensing may be achieved without the use of color filters. | 08-16-2012 |
20120273653 | IMAGE SENSOR ARRAY FOR THE BACK SIDE ILLUMINATION WITH JUNCTION GATE PHOTODIODE PIXELS - The present invention relates to a junction gate photo-diode (JGP) pixel that includes a JGP for accumulating charge in response to impinging photons. The JGP is positioned on a substrate and includes a top n layer, a middle p layer and a bottom n layer forming a n-p-n junction, and a control terminal coupled to the top n layer. Also included is a floating diffusion (FD) positioned on the substrate and coupled to a pixel output line through an amplifier. Also included is a pinned barrier (PB) positioned on the substrate between the JGP and the FD, the PB temporarily blocks charge transfer between the JGP and the FD. The accumulated charge is transferred from the JGP to FD by applying a control voltage to the JGP control terminal. | 11-01-2012 |
20120273654 | IMAGE SENSOR ARRAY FOR BACK SIDE ILLUMINATION WITH GLOBAL SHUTTER USING A JUNCTION GATE PHOTODIODE - The present invention provides a junction gate photo-diode (JGP) pixel that includes a JGP accumulating charge in response to impinging photons. The JGP is positioned on a substrate and includes a top n layer, a middle p layer and a bottom n layer forming a n-p-n junction, and a control terminal coupled to the top n layer. Also includes is a floating diffusion (FD) positioned on the substrate and coupled to a pixel output line through an amplifier. Also includes is a pinned barrier (PB) and a storage gate (SG) positioned on the substrate between the JGP and the FD. The PB temporarily blocks charge transfer between the JGP and the FD, and the SG stores the accumulated charge from the JGP, and transfers the stored charge to the FD for readout. | 11-01-2012 |
20120295386 | STRATIFIED PHOTODIODE FOR HIGH RESOLUTION CMOS IMAGE SENSOR IMPLEMENTED WITH STI TECHNOLOGY - A stratified photodiode for high resolution CMOS image sensors implemented with STI technology is provided. The photodiode includes a semi-conductive layer of a first conductivity type, multiple doping regions of a second conductivity type, multiple doping regions of the first conductivity type, and a pinning layer. The multiple doping regions of the second conductivity type are formed to different depths in the semi-conductive layer. The multiple doping regions of the first conductivity type are disposed between the multiple doping regions of the second conductivity type and form multiple junction capacitances without full depletion. In particular, the stratified doping arrangement allows the photodiode to have a small size, high charge storage capacity, low dark current, and low operation voltages. | 11-22-2012 |
20130026345 | SMALL PIXEL FOR IMAGE SENSORS WITH JFET AND VERTICALLY INTEGRATED RESET DIODE - A pixel and a pixel array of an image sensor device of the present invention have small pixel sizes by resetting sensed charge using a diode built vertically above a substrate. The pixel and the pixel array also have low noise performance by using a JFET as a source follower transistor for sensing charge. The pixel includes a floating diffusion node configured to sense photo-generated charge, a reset diode configured to reset the floating diffusion node in response to a reset signal, and a junction field effect transistor configured to output a signal having an output voltage level corresponding to a charge level of the floating diffusion node. | 01-31-2013 |
20130130429 | IMAGE SENSOR WITH IMPROVED COLOR CROSSTALK - An image sensor comprises a substrate of a first conductivity type. First and second pixels are arrayed over the substrate. A potential barrier is formed in a region of the substrate corresponding to the first pixel but not in a region of the substrate corresponding to the second pixel. The second pixel is responsive to a color having a wavelength longer than the color to which the first pixel is responsive. The potential barrier is doped with dopants by a high energy ion implantation dopants or by an ion implantation or diffusion during epitaxial growth of the P-type epitaxial layer. | 05-23-2013 |
20130143351 | SMALL PIXEL FOR CMOS IMAGE SENSORS WITH VERTICALLY INTEGRATED SET AND RESET DIODES - A pixel of an image sensor, the pixel includes a floating diffusion node to sense photo-generated charge, a reset diode to reset the floating diffusion node in response to a reset signal, and a set diode to set the floating diffusion node. | 06-06-2013 |
20130146747 | IMAGE SENSORS WITH VERTICAL JUNCTION GATE SOURCE FOLLOWER PIXELS - An image sensor pixel suitable for use in a back-side-illuminated or a front-side-illuminated sensor arrangement is provided. The image sensor pixel may be a small size pixel that includes a source follower implemented using a vertical junction field effect (JFET) transistor. The vertical JFET source follower may be integrated directly into the floating diffusion node, thereby eliminating excess metal routing and pixel area typically allocated for the source follower in conventional pixel configurations. Pixel area may instead be allocated for increasing the charge storage capacity of the photodiode or can be used to reduce pixel size while maintaining pixel performance. Using a vertical junction field effect transistor in this way simplifies pixel addressing operations and minimizes random telegraph signal (RTS) noise associated with small size metal-oxide-semiconductor (MOS) transistors. | 06-13-2013 |
20130153973 | IMAGE SENSOR PIXELS WITH JUNCTION GATE PHOTODIODES - Image sensor pixels are provided having junction gate photodiodes. A group of pixels may have a shared floating diffusion region and a shared source-follower transistor. The source-follower transistor may be a JFET source-follower with a gate that forms the floating diffusion region. The JFET source-follower may be a vertical or lateral JFET. A reset diode may be forward-biased to reset the floating diffusion region. Each pixel may have a JFET that serves as a charge transfer barrier between the junction gate photodiode and the floating diffusion region. The charge transfer barrier JFET may be a lateral JFET. The image sensor pixels may be formed without any metal-oxide-semiconductor devices. | 06-20-2013 |
20130234784 | IMAGE PIXEL EMPLOYING FLOATING BASE READOUT CONCEPT, AND IMAGE SENSOR AND IMAGE SENSOR ARRAY INCLUDING THE IMAGE PIXEL - A pixel of an image sensor includes only two signal lines per pixel, a pinned photodiode for sensing light, a floating base bipolar transistor, and no reset and address transistors. The floating base bipolar transistor provides the pixel with a gain, which can increase pixel sensitivity and reduce noise. The pixel also incorporates a vertical blooming control structure for an efficient blooming suppression. The output terminals of the pixel are coupled to a common column output line terminated by a special current sensing correlated double sampling circuit, which is used for subtraction of emitter leakage current. Based on this structure, the pixel has high sensitivity, high response uniformity, low noise, reduced size, and efficient layout. | 09-12-2013 |
20130292548 | IMAGE SENSORS WITH PHOTOELECTRIC FILMS - An image sensor with an organic photoelectric film for converting light into charge may be provided. The image sensor may include an array of image sensor pixels. Each image sensor pixel may include a charge-integrating pinned diode that collects photo-generated charge from the photoelectric film during an integration period. An anode electrode may be coupled to an n+ doped charge injection region in the charge-integrating pinned diode and may be used to convey the photo-generated charge from the photoelectric film to the charge-integrating pinned diode. Upon completion of a charge integration cycle, a first transfer transistor gate may be pulsed to move the charge from the charge-integrating pinned diode to a charge-storage pinned diode. The charge may be transferred from the charge-storage pinned diode to a floating diffusion node for readout by pulsing a gate of a second charge transfer transistor. | 11-07-2013 |
20140077062 | BACK SIDE ILLUMINATED IMAGE SENSORS WITH BACK SIDE CHARGE STORAGE - A back side illuminated image sensor may be provided with an array of image sensor pixels. Each image sensor pixel may include a substrate having a front surface and a back surface. The image sensor pixels may have a charge storage region formed at the back surface and a charge readout node formed at the front surface of the substrate. The image sensor pixels may receive image light at the back surface of the substrate. Photo-generated charge may be accumulated at the charge storage region during a charge integration cycle. Upon completion of the charge integration cycle, a transfer gate formed at the front surface may be pulsed high to move the charge from the charge storage region to the charge readout node. The charge may be converted to a voltage at the charge readout node and may be read out using a rolling shutter readout mode. | 03-20-2014 |
20140085523 | BACK SIDE ILLUMINATED GLOBAL SHUTTER IMAGE SENSORS WITH BACK SIDE CHARGE STORAGE - A back side illuminated image sensor may be provided with an array of image sensor pixels. Each pixel may include a substrate having a front surface and a back surface. The pixels may have a charge storage region at the back surface and a charge readout node at the front surface of the substrate. The pixels may receive light at the back surface. Photo-generated charge may be accumulated at the charge storage region during a charge integration cycle. Upon completion of the charge integration cycle, a transfer gate formed at the front surface may be pulsed high to move the charge from the charge storage region to the charge readout node using a global shutter algorithm. The pixels may include two reset transistors that are coupled to column feedback amplifier circuitry for mitigating kTC-reset noise when the pixels are operated in a global shutter mode. | 03-27-2014 |
20140246748 | IMAGE SENSORS WITH SMALL PIXELS HAVING HIGH WELL CAPACITY - An image sensor having small pixels with high charge storage capacity, low dark current, no image lag, and good blooming control may be provided. The high charge storage capacity is achieved by placing a p+ type doped layer under the pixel charge storage region with an opening in it for allowing photo-generated charge carriers to flow from the silicon hulk to the charge storage well located near the surface of the photodiode. A compensating n-type doped implant may be formed in the opening. Image lag is prevented by placing a p− type doped region under the p+ type doped photodiode pinning layer and aligned with the opening. Blooming control is achieved by adjusting the length of the transfer gate in the pixel and thereby adjusting the punch-through potential under the gate. | 09-04-2014 |
20140247380 | IMAGE SENSOR PIXELS WITH SELF-ALIGNED LATERAL ANTI-BLOOMING STRUCTURES - Pixels for solid-state CMOS image sensor arrays may be provided that have a lateral blooming control structure incorporated in them. The lateral blooming control structure is built as a separate structure from the charge transfer gate and it is fabricated in a self-aligned manner, which is particularly suitable for incorporating into small size pixels. The blooming control structure can be used for backside or for front side illuminated image sensors. When the lateral blooming control structure is provided with a separate bias means, it may also be used for the complete or partial charge removal from the photodiode and thus used in pixels that are designed for global shutter operation. | 09-04-2014 |
20140367552 | IMAGE SENSORS, METHODS, AND PIXELS WITH TRI-LEVEL BIASED TRANSFER GATES - An image sensor includes at least one pixel with a transfer gate that is controllable among at least three biasing conditions, including a first biasing condition in which electrons are transferable from a photodiode to a potential well under the transfer gate, a second biasing condition in which the electrons are confined in the potential well under the transfer gate, and a third biasing condition in which the electrons are transferable out of the potential well under the transfer gate. The pixel includes a p+ type doped barrier implant located at least partially under a portion of the transfer gate, and a pinned charge transfer barrier located on the opposite side of the transfer gate from the photodiode that includes a p+ type doped region and an n-type doped region. The image sensor can operate in a global shutter mode and/or a rolling shutter mode. | 12-18-2014 |
20150054997 | IMAGE SENSORS HAVING PIXEL ARRAYS WITH NON-UNIFORM PIXEL SIZES - An image sensor having an array of pixels and a silicon substrate may be provided. In one embodiment, the array of pixels may have pixels of equal charge storage capacity but with varying sizes and thus varying sensitivities. For example, a first pixel may have a larger charge-generating volume than a second pixel. In another suitable embodiment, the charge storage capacity of the image sensor pixels may be varied while the charge-generating volume remains the same. These configurations are achieved by placing a p+ type doped layer in the silicon substrate close to and parallel to the surface of the array. The p+ type doped layer may include a plurality of openings to allow photo-generated carriers to flow from the silicon bulk to the charge storage wells located near the surface of the substrate. | 02-26-2015 |
20150060951 | IMAGE SENSORS OPERABLE IN GLOBAL SHUTTER MODE AND HAVING SMALL PIXELS WITH HIGH WELL CAPACITY - An image sensor operable in global shutter mode ma include small pixels with high charge storage capacity, low dark current, and no image lag. Storage capacity of a photodiode and a charge storage diode may be increased by placing a p+ type doped layer under the photodiode and the charge storage diode. The p+ type doped layer ma include an opening for allowing photo-generated charge carriers to flow from the silicon bulk to the charge storage well located near the surface of the photodiode. A compensating n− type doped implant may be formed in the opening. Image lag is prevented by placing a p− type doped region under the p+ type doped photodiode pinning layer and aligned with the opening. The p+ type doped layer may extend under the entire pixel array. | 03-05-2015 |