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Janke, Munich

Marcus Janke, Munich DE

Patent application numberDescriptionPublished
20090206165CONTACTLESS CHIP MODULE, CONTACTLESS DEVICE, CONTACTLESS SYSTEM, AND METHOD FOR CONTACTLESS COMMUNICATION - A contactless chip module including a power supply, adapted to supply the contactless chip module with power obtained from an electromagnetic field; a first receiver adapted to receive an actively modulated signal; and a second receiver adapted to receive a passively modulated signal contained in the electromagnetic field.08-20-2009
20090207016APPARATUS AND METHOD FOR SECURE SENSING - An apparatus including a sensor configured to sense a physical quantity, an actuator configured to manipulate the physical quantity in a predefined manner, and a detection circuit configured to output an alarm signal in case the sensor does not react to the manipulation of the physical quantity in an expected way.08-20-2009
20090289761SECURE METHOD FOR BIOMETRIC VERIFICATION OF A PERSON - In various embodiments, a method for biometric verification of a person is provided. The method may include detecting a biometric sample of a biometric characteristic of the person, and reading out a stored biometric feature from a data carrier and carrying out a comparison of the stored biometric feature with the detected biometric sample by means of a control unit; wherein at least one data area of the stored biometric feature is altered by means of disturbances, the control unit determines the altered disturbed data area of the stored biometric feature and omits the determined disturbed data areas during the comparison.11-26-2009
20100001757INTEGRATED CIRCUIT AND METHOD OF PROTECTING A CIRCUIT PART TO BE PROTECTED OF AN INTEGRATED CIRCUIT - A integrated circuit comprises a circuit part to be protected and protective lines located at least one wiring level of the integrated circuit. In addition, the integrated circuit comprises logical gates coupled to the protective lines, whereby a logic circuit is formed, and a processing unit implemented to detect a manipulation of the integrated circuit by applying test patterns to the logic circuit and verifying a logic output value of the logic circuit responsive to the test patterns.01-07-2010
20100013631ALARM RECOGNITION - A method and apparatus of recognizing an alarm scenario in a chip card. The method includes detecting a deviation of a property, and determining whether the deviation is a result of an alarm scenario.01-21-2010
20100031059SECURITY DEVICE, SECURE MEMORY SYSTEM AND METHOD USING A SECURITY DEVICE - A security device including a first external interface; a second external interface; and a security controller connected to said first external interface and said second external interface, said security controller being adapted to validate an access right based on a codeword received via said first interface to perform an encrypted memory access via said second external interface to an external memory coupleable to said second external interface, and to prevent that encrypted memory access via said first external interface or prevent any output of data via said first external interface depending on data received via said second external interface in case of a negative validation.02-04-2010
20100070953COMPILER SYSTEM AND A METHOD OF COMPILING A SOURCE CODE INTO AN ENCRYPTED MACHINE LANGUAGE CODE - A compiler system including a compiler configured to compile a source code into a machine language code is presented, so that the machine language code is executable on a processing unit, wherein the processing unit comprises an internal register that is changing its state responsive to an execution of the machine language code. The compiler is configured to encrypt the machine language code based on an encryption function that depends on the state of the internal register.03-18-2010

Patent applications by Marcus Janke, Munich DE

Markus Janke, Munich DE

Patent application numberDescriptionPublished
20090172489CIRCUIT ARRANGEMENT AND METHOD FOR CHECKING THE FUNCTION OF A LOGIC CIRCUIT IN A CIRCUIT ARRANGEMENT - A circuit arrangement comprising a logic circuit to be tested and a test circuit is provided. The logic circuit is designed to provide output data from input data, said output data being generated from the input data by logic-circuit-internal combinations, such that the output data are in a predetermined relationship with the input data. The logic circuit is designed to detect whether the relationship is fulfilled and to provide an error signal if the relationship is not fulfilled. The test circuit is designed to alter logic-circuit-internal combinations. The test circuit is designed to detect the error signal, and is furthermore designed to output an alarm signal if the error signal is not detected upon alteration of the logic-circuit-internal combinations.07-02-2009