| Patent application number | Description | Published |
|---|
| 20080231779 | Display substrate and display apparatus having the same - A display substrate includes a pixel layer, a color filter layer and a pixel electrode. The pixel layer includes a first storage electrode, a second storage electrode and a third storage electrode respectively associated with a red pixel, a green pixel and a blue pixel. At least one of the first, second and third storage electrodes has a different area from a remainder of the storage electrodes. The color filter layer includes a red color filter, a green color filter and a blue color filter formed on the pixel layer. The red, green and blue color filters respectively correspond to the red pixel, the green pixel and the blue pixel. Pixel electrodes are formed on the color filter layer. The pixel electrodes correspond to the red, green and blue pixels. | 09-25-2008 |
| 20090121228 | ARRAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A gate line includes a first seed layer formed on a base substrate and a first metal layer formed on the first seed layer. A first insulation layer is formed on the base substrate. A second insulation layer is formed on the base substrate. Here, a line trench is formed through the second insulation layer in a direction crossing the gate line. A data line includes a second seed layer formed below the line trench and a second metal layer formed in the line trench. A pixel electrode is formed in a pixel area of the base substrate. Therefore, a trench of a predetermined depth is formed using an insulation layer and a metal layer is formed through a plating method, so that a metal line having a sufficient thickness may be formed. | 05-14-2009 |
| 20090251647 | DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A display substrate includes a plurality of color filters, a gate line, an insulation layer, a data line and a plurality of pixel electrodes. The color filters are formed on a base substrate. The gate line is formed in a trench defined by at least one of the color filters and extended along a first direction. The insulation layer is formed on the color filters and the gate line. The data line is formed on the insulation layer to be extended along a second direction crossing the first direction. The pixel electrodes are formed on the base substrate having the data line formed thereon. Therefore, a metal wiring is formed in a trench defined by color filters, so that the resistance of the metal wiring may be decreased and an aperture ratio may be enhanced. | 10-08-2009 |
| 20100210052 | THIN FILM TRANSISTOR PANEL, LIQUID CRYSTAL DISPLAY HAVING THE SAME AND METHOD OF MANUFACTURING THE THIN FILM TRANSISTOR PANEL - A thin film transistor panel, a liquid crystal display having the same, and a method of manufacturing the thin film transistor panel are provided. The thin film transistor includes a gate line formed on an insulating substrate in a predetermined direction, a data line crossing the gate line, a thin film transistor connected to the gate line and the data line, a black matrix formed to overlap at least a portion of the gate line, the data line, and the thin film transistor, a color filter formed in a region partitioned by the black matrix, and a pixel electrode formed on the color filter and electrically connected to the thin film transistor. | 08-19-2010 |
| 20100261322 | ARRAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A gate line includes a first seed layer formed on a base substrate and a first metal layer formed on the first seed layer. A first insulation layer is formed on the base substrate. A second insulation layer is formed on the base substrate. Here, a line trench is formed through the second insulation layer in a direction crossing the gate line. A data line includes a second seed layer formed below the line trench and a second metal layer formed in the line trench. A pixel electrode is formed in a pixel area of the base substrate. Therefore, a trench of a predetermined depth is formed using an insulation layer and a metal layer is formed through a plating method, so that a metal line having a sufficient thickness may be formed. | 10-14-2010 |
| Patent application number | Description | Published |
|---|
| 20080203393 | THIN FILM TRANSISTOR ARRAY PANEL AND FABRICATION - The present invention provides a manufacturing method of a thin film transistor array panel, which includes forming a gate line on a substrate; forming a gate insulating layer, a semiconductor layer, and an ohmic contact on the gate line; forming a first conducting film including Mo, a second conducting film including Al, and a third conducting film including Mo on the ohmic contact; forming a first photoresist pattern on the third conducting film; etching the first, second, and third conducting films, the ohmic contact, and the semiconductor layer using the first photoresist pattern as a mask; removing the first photoresist pattern by a predetermined thickness to form a second photoresist pattern; etching the first, second, and third conducting films using the second photoresist pattern as a mask to expose a portion of the ohmic contact; and etching the exposed ohmic contact using a Cl-containing gas and a F-containing gas. | 08-28-2008 |
| 20080299712 | MANUFACTURING METHOD OF A THIN FILM TRANSISTOR ARRAY PANEL - A method of manufacturing a thin film transistor array panel includes forming a gate line including a gate electrode, forming a gate insulating layer on the gate line, forming a semiconductor stripe on the gate insulating layer; forming ohmic contacts on the semiconductor stripe, forming a data line including a source electrode and a drain electrode on the ohmic contacts, depositing a passivation layer on the data line and the drain electrode, and forming a pixel electrode connected to the drain electrode. The formation of the data line and the drain electrode, the ohmic contacts, and the semiconductor stripe includes depositing an intrinsic silicon layer, an extrinsic silicon layer, and a conductor layer on the gate insulating layer, forming a photoresist including a second portion corresponding to a channel area between the source electrode and the drain electrode, and a first portion corresponding to a wire area on the data line and the drain electrode, wherein the first portion is thicker than the second portion, etching the conductor layer corresponding to a remaining area except for the wire and the channel area using the photoresist as an etch mask, removing the second portion to expose the conductor layer on the channel areas, etching the intrinsic silicon layer and the extrinsic silicon layer on the remaining area, etching the conductor layer and the extrinsic silicon layer on the channel areas, and removing the first portion. | 12-04-2008 |
| 20090315033 | THIN FILM TRANSISTOR ARRAY PANEL AND A METHOD FOR MANUFACTURING THE SAME - A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors. | 12-24-2009 |
| 20100203715 | THIN FILM TRANSISTOR ARRAY PANEL AND FABRICATION - The present invention provides a manufacturing method of a thin film transistor array panel, which includes forming a gate line on a substrate; forming a gate insulating layer, a semiconductor layer, and an ohmic contact on the gate line; forming a first conducting film including Mo, a second conducting film including Al, and a third conducting film including Mo on the ohmic contact; forming a first photoresist pattern on the third conducting film; etching the first, second, and third conducting films, the ohmic contact, and the semiconductor layer using the first photoresist pattern as a mask; removing the first photoresist pattern by a predetermined thickness to form a second photoresist pattern; etching the first, second, and third conducting films using the second photoresist pattern as a mask to expose a portion of the ohmic contact; and etching the exposed ohmic contact using a Cl-containing gas and a F-containing gas. | 08-12-2010 |
