Patent application number | Description | Published |
20080283911 | High-voltage semiconductor device and method for manufacturing the same - A high-voltage semiconductor device and a method for manufacturing the same are disclosed. The disclosed high-voltage semiconductor device includes a semiconductor substrate, a first N type well in the semiconductor substrate, a first P type well in the first N type well, second N type wells in the first N type well along a periphery of the first P type well, a gate insulating film and a gate electrode on the first P type well, and first heavily-doped N type impurity regions in the first P type well at opposite sides of the gate electrode. | 11-20-2008 |
20080283915 | HIGH VOLTAGE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - The present invention provides a high voltage semiconductor device and a method of manufacturing the same. The high voltage semiconductor device includes: a semiconductor substrate; a first high voltage N-type well formed on the semiconductor substrate; a first high voltage P-type well formed inside the first high voltage N-type well; a second high voltage N-type well formed to surround the first high voltage P-type well inside the first high voltage N-type well; a gate dielectric layer and a gate electrode formed to be stacked on the upper of the first high voltage P-type well; and a first N-type high-concentration impurity region formed at both sides of the gate electrode in the first high voltage P-type well, wherein the concentration of the upper region of the first high voltage N-type well is lower than that of the lower region thereof, based on a portion formed with the first high voltage P-type well. Therefore, the present invention can apply bulk bias, simplify a process, improve punch through breakdown voltage in the P-type well formed inside a low-concentration deep N-type well, reduce field of a high-concentration N-type impurity region, and reduce resistance. | 11-20-2008 |
20090001485 | Semiconductor Device and Manufacturing Method Thereof - Disclosed is a semiconductor device that can be used as a high voltage transistor. The semiconductor device can include a gate electrode on a semiconductor substrate, drift regions in the substrate at opposite sides of the gate electrode, a source region in one of the drift regions and a drain region in the other of the drift regions, and a shallow trench isolation (STI) region in a portion of the drift region between the gate electrode and the drain region. The portion of the drift region below the STI region can have a doping profile in which the concentration of impurities decreases from the concentration at the lower surface of the STI region, and then increases, and then again decreases. | 01-01-2009 |
20090057779 | Semiconductor Device and Method of Fabricating the Same - A semiconductor device and a method of fabricating the same are disclosed. The semiconductor device includes a semiconductor substrate having a first area implanted with first conductive type impurities; an isolating film defining a first active area and a second active area in the first area; first LDD areas spaced from each other on the first active area at a first interval and implanted with second conductive type impurities; and second LDD areas spaced from each other on the second active area at a second interval narrower than the first interval and implanted with the second conductive type impurities. | 03-05-2009 |
20090291539 | METHOD FOR MANUFACTURING AND LCD DRIVER IC - A method of manufacturing an LCD driver chip includes forming a heavily doped P-type well and a heavily doped N-type well over a high voltage region of a substrate; and then forming an oxide layer over the heavily doped P-type well and the heavily doped N-type; and then simultaneously forming a first gate electrode over the heavily doped P-type well and a second gate electrode over the heavily doped N-type well including the oxide layer; and then patterning the oxide layer to form a gate insulating layer under the first and second gate electrodes and an oxide layer portion connected to lateral sides of the gate insulating layers; and then forming an insulating layer over the entire surface of the substrate including the first and second gate electrodes and the oxide layer portion; and then forming spacers on sidewalls of the first and second gate electrodes and then removing the oxide layer portion after forming the spacers; and then forming ion implantations regions over the heavily doped P-type well and the heavily doped N-type well. | 11-26-2009 |
Patent application number | Description | Published |
20130293270 | SWITCH CONTROLLER, SWITCH CONTROL METHOD, AND POWER SUPPLY DEVICE COMPRISING THE SWITCH CONTROLLER - The present invention relates to a switch controller, a switch control method, and a power supply using the switch controller. | 11-07-2013 |
20140268925 | SWITCH CONTROL CIRCUIT, SWITCH CONTROL METHOD AND POWER SUPPLY DEVICE USING THE SAME - Embodiment relates to a switch control circuit, a switch control method, and a power supply using the switch control circuit. The power supply supplies power to a load using an input voltage. The switch control circuit controls a switching operation of the power switch that controls the power supply. The switch control circuit detects a duty of the power switch using a signal for controlling the switching operation of the power switch, detects the load using the feedback voltage, and determines a short-circuit of the sense resistor according to the detected duty and the detected load. | 09-18-2014 |
20140368254 | GATE DRIVER, SWITCH CONTROL CIRCUIT AND POWER SUPPLY DEVICE COMPRISING THE GATE DRIVER CIRCUIT - The present invention relates to a gate driving circuit, a switch control circuit including the gate driving circuit, and a power supply. The gate driving circuit generates a gate voltage of the power switch. The gate driving circuit includes: a delay control circuit generating a first control signal that controls a rising slope of the gate voltage at a first time after a first delay period is passed from a rising time of the gate voltage and generating a second control signal that controls the rising slope of the gate voltage at a time after a second delay period is passed from the first time; and a temperature compensation circuit that varies the first delay period according to a temperature. | 12-18-2014 |
Patent application number | Description | Published |
20100245698 | LIQUID CRYSTAL DISPLAY DEVICE - The present invention relates to a liquid crystal display. The liquid crystal display has a lower panel including a first pixel area having a first pixel electrode and a first light leakage preventing member, a final pixel area having a second pixel electrode and a second light leakage preventing member, and middle pixel areas disposed between the first pixel area and the final pixel area, each of the middle pixel areas including a first middle pixel electrode and a second middle pixel electrode. Accordingly, light leakage may be effectively prevented at the first pixel area and the final pixel area that are disposed on the edge. | 09-30-2010 |
20100321617 | LIQUID CRYSTAL DISPLAY AND MANUFACTURING METHOD THEREOF - Exemplary embodiments of the present invention disclose a liquid crystal display (LCD) and a method of manufacturing the same. The LCD may have a display area and a peripheral area. An organic layer of the peripheral area may be patterned using a half-tone mask, and a protrusion member may be formed in the peripheral area. Accordingly, the thin film transistor array panel and the corresponding substrate may be prevented from being temporary adhered in the peripheral area such that the density of the liquid crystal molecules filled in the peripheral area may be uniformly maintained and the display quality of the liquid crystal display may be improved. | 12-23-2010 |
20110049519 | Thin Film Transistor Array Panel and Method of Manufacturing the Same - A thin film transistor array panel includes an insulation substrate. A signal line is formed on the insulation substrate. A thin film transistor is connected to the signal line. A color filter is formed on the substrate. An organic insulator is formed on the color filter and includes a first portion and a second portion having different thicknesses. A light blocking member is formed on the second portion of the organic insulator. A difference between the surface height of the first portion of the organic insulator and the surface height of the second portion of the organic insulator is in the range of about 2.0 μm to 3.0 μm. | 03-03-2011 |
20120008075 | REFLECTION TYPE DISPLAY APPARATUS - A reflection type display apparatus includes; a first substrate including a plurality of pixel regions, a second substrate disposed substantially opposite to the first substrate, an image display part interposed between the first substrate and the second substrate and which at least one of absorbs and reflects external light therefrom, and a color filter part provided on at least one of the first substrate and the second substrate and including a plurality of color filters corresponding to the plurality of pixel regions in a one-to-one correspondence, wherein each color filter of the plurality of color filters includes a colored part including one color and a white color part including a white color. In one embodiment, the white color part has an area corresponding to a range of about 20% to about 50% or about 75% to about 120% with respect to an area of the colored part. | 01-12-2012 |
20120154898 | ELECTROPHORETIC DISPLAY APPARATUS - An electrophoretic display apparatus includes a first substrate including a plurality of pixels, a second substrate facing the first substrate, an electrophoretic material between the first and second substrates, and a first electrode on the first substrate or the second substrate. Each pixel includes a reflection part and a second electrode. The reflection part is on the first substrate and reflects light incident through the second substrate. The second electrode is on the first substrate and adjacent to the reflection part. The second electrode forms an electric field with the first electrode such that the electrophoretic material moves to the first electrode or the second electrode. An upper surface of the second electrode is positioned at a first height from the first substrate, and an upper surface of an uppermost layer of the reflection part is positioned at a second height higher than the first height. | 06-21-2012 |
20120248480 | DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME - Provided are a display device and a method of manufacturing of the display device. The display device includes a substrate subjected to a primary preprocess; a conductor formed on the substrate and subjected to a secondary preprocess; and an insulating layer formed on the substrate and the conductor, in which the primary preprocess is performed for a surface energy of the first substrate higher than a first reference value and the secondary preprocess is performed for a surface energy of the conductor lower than a second reference value. | 10-04-2012 |
20120280958 | ELECTROPHORETIC DISPLAY APARATUS AND METHOD OF DRIVING THE SAME - In an electrophoretic display apparatus, a first substrate includes a plurality of pixels each including at least two sub-pixels which display colors different from each other, and a second substrate which faces the first substrate and includes a reference electrode corresponding to a boundary between adjacent sub-pixels in each pixel. An electrophoretic material is between the first substrate and the second substrate. A barrier wall is between the first substrate and the second substrate, and defines the pixels. | 11-08-2012 |
20140036211 | LIQUID CRYSTAL DISPLAY AND MANUFACTURING METHOD THEREOF - Exemplary embodiments of the present invention disclose a liquid crystal display (LCD) and a method of manufacturing the same. The LCD may have a display area and a peripheral area. An organic layer of the peripheral area may be patterned using a half-tone mask, and a protrusion member may be formed in the peripheral area. Accordingly, the thin film transistor array panel and the corresponding substrate may be prevented from being temporary adhered in the peripheral area such that the density of the liquid crystal molecules filled in the peripheral area may be uniformly maintained and the display quality of the liquid crystal display may be improved. | 02-06-2014 |
20150144941 | DISPLAY SUBSTRATE COMPRISING PIXEL TFT AND DRIVING TFT AND PREPARATION METHOD THEREOF - Disclosed is a display substrate including a driving unit on a substrate comprising a first thin film transistor and a display unit on the substrate being adjacent to the driving unit and comprising a second thin film transistor. | 05-28-2015 |
Patent application number | Description | Published |
20110254069 | FLOATING GATE TYPE NONVOLATILE MEMORY DEVICE AND RELATED METHODS OF MANUFACTURE AND OPERATION - A floating gate type nonvolatile memory device comprises a semiconductor layer, wordlines crossing over the semiconductor layer, and a memory element disposed between the wordlines and facing the semiconductor layer. | 10-20-2011 |
20120086072 | THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE AND RELATED METHOD OF MANUFACTURE - A method of manufacturing a three-dimensional semiconductor memory device comprises forming a thin layer structure by alternately stacking first and second material layers on a substrate, forming a penetration dent penetrating the thin layer structure and exposing a top surface of the substrate recessed by the penetration dent, forming a vertical insulation layer penetrating the thin layer structure to cover an inner wall of the penetration dent, forming a semiconductor pattern penetrating the vertical insulation layer at the penetration dent to be inserted into the substrate, and forming an oxide layer between the thin layer structure and the substrate by oxidizing a sidewall of the penetration dent. | 04-12-2012 |
20120140562 | NONVOLATILE MEMORY DEVICE AND METHOD OF MAKING THE SAME - A nonvolatile memory device includes a substrate, a structure including a stack of alternately disposed layers of conductive and insulation materials disposed on the substrate, a plurality of pillars extending through the structure in a direction perpendicular to the substrate and into contact with the substrate, and information storage films interposed between the layers of conductive material and the pillars. In one embodiment, upper portions of the pillars located at the same level as an upper layer of the conductive material have structures that are different from lower portions of the pillars. In another embodiment, or in addition, upper string selection transistors constituted by portions of the pillars at the level of an upper layer of the conductive material are programmed differently from lower string selection transistors. | 06-07-2012 |
Patent application number | Description | Published |
20090094498 | APPARATUS AND METHOD FOR TRANSMITTING AND RECEIVING AUTOMATIC RETRANSMISSION REQUEST FEEDBACK INFORMATION ELEMENT IN A COMMUNICATION SYSTEM - An Automatic Retransmission reQuest (ARQ) data block reception apparatus and method in a communication system is provided. In the ARQ method, an ARQ feedback Information Element (IE) is transmitted to an ARQ data block transmission apparatus. The ARQ feedback IE includes a first field for indicating a Connection IDentifier (CID) of an ARQ connection, a second field for indicating the presence/absence of an additional ARQ feedback IE after the ARQ feedback IE, a third field for indicating a type of an Acknowledgement (ACK) MAP included in the ARQ feedback IE, a fourth field for indicating a Block Sequence Number (BSN) of an ARQ data block, and m ACK MAP fields. The m ACK MAP fields each include information indicating presence/absence of an additional ACK MAP field after a corresponding ACK MAP field, and an ACK MAP indicating success/failure in normal reception for each of n ARQ data blocks, wherein m and n each denote an integer greater than or equal to 1. | 04-09-2009 |
20090233606 | Method and system for delivering and constructing status information in communication system - Disclosed is a method for delivering buffer status information to a target base station, to which a mobile station has decided to hand over, by a serving base station in a communication system. The method includes the steps of constructing buffer status information containing a first parameter indicating the number of a smallest packet among packets within a predetermined section stored in a buffer, a second parameter indicating the number of a packet to be transmitted at a next point of time, a third parameter indicating the number of a first packet, the lifetime of which has not yet expired, and a fourth parameter indicating whether or not an instruction to initialize the buffer status information has been transmitted to the mobile station; and transmitting a message containing the constructed buffer status information to the target base station. | 09-17-2009 |
20100135227 | Method for resuming services in a wireless communication system - A method for operating a Base Station (BS) in a wireless communication system includes, when a bandwidth request message is received from a Mobile Station (MS), whether a resource allocated to the MS exists is determined. When the resource allocated to the MS does not exist, a resource is temporarily allocated to the MS. A message indicating a network initial entry is transmitted to the MS using the temporarily allocated resource. | 06-03-2010 |