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| 20080242795 | Flameproof Copolymer and Flame Retardant Thermoplastic Resin Composition Including the Same - Disclosed herein is a flameproof copolymer comprising repeating units of (A) about 80 to about 99% by weight of a (meth)acrylic monomer and (B) about 1 to about 20% by weight of a vinyl-containing phosphorous monomer. The present invention also provides a thermoplastic resin composition including the flameproof copolymer. | 10-02-2008 |
| 20090012217 | Flameproof Thermoplastic Resin Composition - A flameproof thermoplastic resin composition can include (A) about 5 to about 40% by weight of an epoxy group-containing rubber modified aromatic vinyl copolymer resin, (B) about 30 to about 90% by weight of a polycarbonate resin, (C) about 1 to about 50% by weight of a polyester resin and (D) about 5 to about 30 parts by weight of a phosphorus-containing flame retardant, per 100 parts by weight of a base resin comprising (A), (B) and (C). | 01-08-2009 |
| 20090118402 | Scratch-Resistant Flameproof Thermoplastic Resin Composition - Disclosed herein is a flame retardant thermoplastic resin composition that has superior scratch resistance and mechanical properties, satisfying requirements for the appearance of housing materials resulting from a recent increase in volume of electrical and electronic products, and that contains a phosphorus-based flame-retarding agent, satisfying requirements for fire safety and prevention of environmental problems. The resin composition with scratch resistance comprises a base resin comprising (A) about 30 to about 90 parts by weight of a polycarbonate resin, (B) about 15 to about 50 parts by weight of a polymethylmethacrylate resin and (C) about 5 to about 50 parts by weight of a polyethylene terephthalate-based resin, and (D) about 5 to about 30 parts by weight of a phosphorus-based flame-retarding agent based on 100 parts by weight of the base resin. The composition may further comprise about 1 to about 30 parts by weight of an impact modifier based on 100 parts by weight of the base resin. | 05-07-2009 |
| 20090203819 | Flameproof Thermoplastic Resin Composition - Disclosed herein is a flameproof thermoplastic resin composition comprising (A) about 5 to about 40 parts by weight of a rubber modified aromatic vinyl copolymer resin; (B) about 30 to about 90 parts by weight of a polycarbonate resin; (C) about 30 to about 90 parts by weight of a polyester resin comprising (c1) about 0.01 to about 99% by weight of a semi-crystalline polyester resin and (c2) about 1 to about 99.99% by weight of a noncrystalline polyester resin; and (D) about 5 to about 30 parts by weight of an aromatic phosphate ester compound, per 100 parts by weight of a base resin comprising (A), (B) and (C). | 08-13-2009 |
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| 20100164623 | TRANSMITTER - A transmitter for supplying a large current upon phase change of an output voltage is disclosed. The transmitter includes a first amplifying unit including a first amplifier including first NMOS and PMOS transistors connected by a common source thereof, and a second amplifier including a second PMOS and NMOS transistors connected by a common drain thereof while being connected with the first amplifier in parallel, a second amplifying unit including a third amplifier including third NMOS and PMOS transistors connected by a common source thereof, and a fourth amplifier including fourth PMOS and NMOS transistors connected by a common drain thereof while being connected with the third amplifier in parallel, and differential output nodes including a positive node connected to an output stage of the first amplifying unit, to which the common source of the first amplifier and the common drain of the second amplifier are connected, and a negative node connected to an output stage of the second amplifying unit, to which the common source of the third amplifier and the common drain of the fourth amplifier are connected. | 07-01-2010 |
| 20100166128 | RECEIVER FOR CLOCK RECONSTITUTION - A receiver for clock reconstitution in a semiconductor field includes a termination resistor arranged between two input stages, to which a pair of input signals are input, the termination resistor including a first resistor and a second resistor; a strobe signal generator for generating a strobe signal, using a first signal corresponding to a differential voltage output from a node between the first resistor and the second resistor; and a clock reconstitutor for generating a clock signal in response to the strobe signal generated from the strobe signal generator. | 07-01-2010 |
| 20100166129 | DATA TRANSMITTING DEVICE AND DATA RECEIVING DEVICE - A data transmitting device and a data receiving device are disclosed. The data transmitting device may include a clock signal generator for generating a clock signal, and a transmitter for generating a transmission signal having the clock signal inserted in a data signal, wherein the clock signal has only a single differential element, and the data signal has two differential elements with an amplitude identical to an amplitude of the clock signal. The clock signal may be embedded and the clock signal may be restored by using the common element of the data signal without any auxiliary reference voltage. As a result, only the data signal line may be used between the data transmitting device and the data receiving device, to reduce the number of transmitting lines. Furthermore, the data transmitting and receiving devices according to embodiments will not need a reference voltage. As a result, the clock signal may be restored smoothly even if the size of the data signal is changing. Further, the amplitude of the clock signal included in the data signal is identical with the amplitude of the data signal. As a result, additional power consumption and EMI may be reduced. | 07-01-2010 |
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| 20100163908 | Light emitting device having vertical structrue and method for manufacturing the same - A light emitting device having a vertical structure and a method for manufacturing the same, which are capable of damping impact generated during a substrate separation process and achieving an improvement in mass productivity, are disclosed. The light emitting device includes a semiconductor layer having a multilayer structure, a first electrode arranged at one surface of the semiconductor layer, a metal support arranged on the first electrode, and an impact damping layer arranged between the first electrode and the metal support, and made of a metal having a ductility higher than a ductility of a metal for the metal support. | 07-01-2010 |
| 20110003416 | LIGHT EMITTING DIODE HAVING VERTICAL TOPOLOGY AND METHOD OF MAKING THE SAME - An LED having vertical topology and a method of making the same is capable of improving a luminous efficiency and reliability, and is also capable of achieving mass productivity. The method includes forming a semiconductor layer on a substrate; forming a first electrode on the semiconductor layer; forming a supporting layer on the first electrode; generating an acoustic stress wave at the interface between the substrate and semiconductor layer, thereby separating the substrate from the semiconductor layer; and forming a second electrode on the semiconductor layer exposed by the separation of the substrate. | 01-06-2011 |
| 20110180833 | Light Emitting Device Having Vertical Structure, Package Thereof And Method For Manufacturing The Same - A light emitting device having a vertical structure, a package thereof and a method for manufacturing the same, which are capable of damping impact generated in a substrate separation process, and achieving an improvement in mass productivity, are disclosed. The method includes growing a semiconductor layer having a multilayer structure over a substrate, forming a first electrode on the semiconductor layer, separating the substrate including the grown semiconductor layer into unit devices, bonding each of the separated unit devices on a sub-mount, separating the substrate from the semiconductor layer, and forming a second electrode on a surface of the semiconductor layer exposed in accordance with the separation of the substrate. | 07-28-2011 |
| 20120018700 | Light Emitting Diode Having Vertical Topology And Method Of Making The Same - An LED having vertical topology and a method of making the same is capable of improving a luminous efficiency and reliability, and is also capable of achieving mass productivity. The method includes forming a semiconductor layer on a substrate; forming a first electrode on the semiconductor layer; forming a supporting layer on the first electrode; generating an acoustic stress wave at the interface between the substrate and semiconductor layer, thereby separating the substrate from the semiconductor layer; and forming a second electrode on the semiconductor layer exposed by the separation of the substrate. | 01-26-2012 |
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| 20100015768 | Method of fabricating semiconductor device having a junction extended by a selective epitaxial growth (SEG) layer - In a semiconductor device, and a method of fabricating the same, the semiconductor device includes a protrusion extending from a substrate and a selective epitaxial growth (SEG) layer surrounding an upper portion of the protrusion, the SEG layer exposing sidewalls of a channel region of the protrusion. | 01-21-2010 |
| 20100093146 | METHOD OF MANUFACTURING MULTI-CHANNEL TRANSISTOR DEVICE AND MULTI-CHANNEL TRANSISTOR DEVICE MANUFACTURED USING THE METHOD - A multi-channel transistor device and a method of manufacturing the same are provided. The method of a manufacturing a multi-channel transistor device includes defining an active region in a semiconductor substrate by forming an isolation layer exposing an upper side portion of the active region. An active expanding region is formed on the exposed upper side portion of the active region by selective epitaxial growth (SEG). A portion of the active region is selectively etched to define first channel bars in the active expanding region that extend between first and second laterally separated portions of the active region and a second channel bar that is an unetched portion of the active region. A portion of the isolation layer is selectively removed such as to expose side portions of the second channel bar and bottom surface portions of the first channel bars. A gate is formed on the first and second channel bars with a gate dielectric layer between the gate and the channel bars. A source/drain region is formed in a region of the active expanding region adjacent to the gate, thereby resulting in a multi-channel transistor structure. | 04-15-2010 |
| 20100140692 | METHODS OF FABRICATING SEMICONDUCTOR DEVICES HAVING MULTIPLE CHANNEL TRANSISTORS AND SEMICONDUCTOR DEVICES FABRICATED THEREBY - In methods of fabricating a semiconductor device having multiple channel transistors and semiconductor devices fabricated thereby, the semiconductor device includes an isolation region disposed within a semiconductor substrate and defining a first region. A plurality of semiconductor pillars self-aligned with the first region and spaced apart from each other are disposed within the first region, and each of the semiconductor pillars has at least one recessed region therein. At least one gate structure may be disposed across the recessed regions, which crosses the semiconductor pillars and extends onto the isolation region. | 06-10-2010 |
| 20110034004 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE - A method of fabricating a semiconductor device, the method including forming a buffer oxide layer in a first region and a second region of a semiconductor substrate; forming a plurality of first preliminary mask patterns on the buffer oxide layer in the first region; forming a plurality of second preliminary mask patterns between every two adjacent first preliminary mask patterns from among the plurality of first preliminary mask patterns, respectively; forming a plurality of first mask patterns and a plurality of second mask patterns by trimming the plurality of first preliminary mask patterns and the plurality of second preliminary mask patterns; forming a plurality of first active region mask patterns for exposing the semiconductor substrate; defining a plurality of active regions in the semiconductor substrate by forming a trench including a plurality of first trench spaces having same width as the first space and a plurality of second trench spaces under the second space in the first region; and forming a first liner layer on the semiconductor substrate having the trench therein such that the plurality of first trench spaces are completely filled with the first liner layer. | 02-10-2011 |
| 20110053369 | Methods of manufacturing a semiconductor memory device - Methods of forming a semiconductor include forming an insulation layer over a semiconductor substrate in which a first region and a second region are defined. A storage node contact (SNC) that passes through the insulation layer is formed and is electrically connected to the first region. A conductive layer that passes through the insulation layer is deposited and is electrically connected to the second region on the insulation layer and the SNC. A bit line is formed by removing an upper portion of the conductive layer, an upper portion of the insulation layer and an upper portion of the SNC until the SNC and the conductive layer are electrically separated from each other, wherein the bit line is a remaining part of the conductive layer. | 03-03-2011 |
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| 20100322180 | METHOD FOR TRANSMITTING SCHEDULING INFORMATION IN MOBILE COMMUNICATION SYSTEM AND FEMTOCELL BASE STATION APPARATUS USING THE SAME - A method for transmitting scheduling information in a mobile communication system and a femtocell base station apparatus using the same are provided. Scheduling information can be transmitted using a hierarchical scheduling scheme in which a femtocell base station is allocated resources from a macrocell base station and the femtocell base station then allocates resources to femto users within its own resource region. | 12-23-2010 |
| 20110044240 | Method for transmitting a packet at a base station in a network using multiple communication schemes - A method of transmitting a packet, at a MS and base station operable using multiple communication schemes is disclosed. The base station of the multiple communication schemes receives a packet from the MS and then determines a transmission path based on a link status of a network, a traffic characteristic of the packet and the like. The base station transmits the packet of the first communication scheme via a network using a second communication scheme, thereby enabling traffic redirection. Such a resource as a frequency band and the like, which will be used between networks using different communication schemes, can be cooperatively set between the MS and the base station. | 02-24-2011 |
| 20120087246 | METHOD FOR PROCESSING TRAFFIC IN AN INTERMEDIATE ACCESS POINT - A method for processing traffic destined for a BS received from one or more terminals in an intermediate access point supporting two or more communication schemes is disclosed. The method includes receiving traffic from the one or more terminals according to a first communication scheme, measuring a congestion level of the received traffic, transmitting a first traffic being part of the received traffic to a second intermediate access point according to a second communication scheme, if the congestion level is a predetermined threshold or higher, and transmitting a second traffic being remaining traffic of the received traffic except the first traffic to the BS. | 04-12-2012 |
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| 20110139489 | PRINTED CIRCUIT BOARD - A printed circuit board is disclosed. The printed circuit board in accordance with an embodiment of the present invention can include an insulation substrate, a first ground, which is formed on one surface of the insulation substrate and connected to a first power source, a second ground, which is formed on one surface of the insulation substrate and connected to a second power source, a separator, which separates the first ground from the second ground, a first signal line, which is stacked on at least one of the first ground and the second ground, and a second signal line, which is stacked on at least one of the first ground and the second ground and is adjacent to the first signal line. The separator can include a curved part, which is bent in between the first signal line and the second signal line. | 06-16-2011 |
| 20110156843 | PRINTED CIRCUIT BOARD AND TRANSMITTING/RECEIVING MODULE INCLUDING THE SAME - A printed circuit board and a transmitting/receiving module including the same are disclosed. The printed circuit board in accordance with an embodiment of the present invention can include a substrate, a first transmission line, which is formed on one surface of the substrate and transmits an inputted data signal, and a second transmission line, which is capacitively connected to the first transmission line. Here, the first transmission line and the second transmission line transmit an ascending edge and a descending edge of the inputted data signal. | 06-30-2011 |
