Patent application number | Description | Published |
20090042344 | InP-Based Transistor Fabrication - Methods of forming structures that include InP-based materials, such as a transistor operating as an inversion-type, enhancement-mode device. A dielectric layer may be deposited by ALD over a semiconductor layer including In and P. A channel layer may be formed above a buffer layer having a lattice constant similar to a lattice constant of InP, the buffer layer being formed over a substrate having a lattice constant different from a lattice constant of InP. | 02-12-2009 |
20090065047 | Multi-Junction Solar Cells - Solar cell structures including multiple sub-cells that incorporate different materials that may have different lattice constants. In some embodiments, solar cell devices include several photovoltaic junctions. | 03-12-2009 |
20100216277 | Formation of Devices by Epitaxial Layer Overgrowth - Methods and structures are provided for formation of devices, e.g., solar cells, on substrates including, e.g., lattice-mismatched materials, by the use of aspect ratio trapping (ART) and epitaxial layer overgrowth (ELO). In general, in a first aspect, embodiments of the invention may include a method of forming a structure. The method includes forming a first opening in a masking layer disposed over a substrate that includes a first semiconductor material. A first layer, which includes a second semi-conductor material lattice-mismatched to the first semiconductor material, is formed within the first opening. The first layer has a thickness sufficient to extend above a top surface of the masking layer. A second layer, which includes the second semiconductor material, is formed on the first layer and over at least a portion of the masking layer. A vertical growth rate of the first layer is greater than a lateral growth rate of the first layer and a lateral growth rate of the second layer is greater than a vertical growth rate of the second layer. | 08-26-2010 |
20110049568 | Lattice-Mismatched Semiconductor Structures with Reduced Dislocation Defect Densities and Related Methods for Device Fabrication - Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures. | 03-03-2011 |
20110114996 | Inducement of Strain in a Semiconductor Layer - Strain is induced in a semiconductor layer. Embodiments include inducing strain by, for example, creation of free surfaces. | 05-19-2011 |
20130040431 | InP-Based Transistor Fabrication - Methods of forming structures that include InP-based materials, such as a transistor operating as an inversion-type, enhancement-mode device. A dielectric layer may be deposited by ALD over a semiconductor layer including In and P. A channel layer may be formed above a buffer layer having a lattice constant similar to a lattice constant of InP, the buffer layer being formed over a substrate having a lattice constant different from a lattice constant of InP. | 02-14-2013 |
20130081684 | Multi-Junction Solar Cells - Solar cell structures including multiple sub-cells that incorporate different materials that may have different lattice constants. In some embodiments, solar cell devices include several photovoltaic junctions. | 04-04-2013 |
20130105860 | Lattice-Mismatched Semiconductor Structures with Reduced Dislocation Defect Densities and Related Methods for Device Fabrication | 05-02-2013 |
20130134480 | Formation of Devices by Epitaxial Layer Overgrowth - Methods and structures are provided for formation of devices, e.g., solar cells, on substrates including, e.g., lattice-mismatched materials, by the use of aspect ratio trapping and epitaxial layer overgrowth. A method includes forming an opening in a masking layer disposed over a substrate that includes a first semiconductor material. A first layer, which includes a second semiconductor material lattice-mismatched to the first semiconductor material, is formed within the opening. The first layer has a thickness sufficient to extend above a top surface of the masking layer. A second layer, which includes the second semiconductor material, is formed on the first layer and over at least a portion of the masking layer. A vertical growth rate of the first layer is greater than a lateral growth rate of the first layer and a lateral growth rate of the second layer is greater than a vertical growth rate of the second layer. | 05-30-2013 |
20130181215 | ROTATED CHANNEL SEMICONDUCTOR FIELD EFFECT TRANSISTOR - A transistor device, such as a rotated channel metal oxide/insulator field effect transistor (RC-MO(I)SFET), includes a substrate including a non-polar or semi-polar wide band gap substrate material such as an Al | 07-18-2013 |
20130285116 | Lattice-Mismatched Semiconductor Structures with Reduced Dislocation Defect Densities and Related Methods for Device Fabrication - Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures. | 10-31-2013 |
20140106546 | Lattice-Mismatched Semiconductor Structures with Reduced Dislocation Defect Densities and Related Methods for Device Fabrication - Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures. | 04-17-2014 |
20140147981 | Inducement of Strain in a Semiconductor Layer - Strain is induced in a semiconductor layer. Embodiments include inducing strain by, for example, creation of free surfaces. | 05-29-2014 |
20140327060 | Semiconductor Sensor Structures with Reduced Dislocation Defect Densities and Related Methods for the Same - Non-silicon based semiconductor devices are integrated into silicon fabrication processes by using aspect-ratio-trapping materials. Non-silicon light-sensing devices in a least a portion of a crystalline material can output electrons generated by light absorption therein. Exemplary light-sensing devices can have relatively large micron dimensions. As an exemplary application, complementary-metal-oxide-semiconductor photodetectors are formed on a silicon substrate by incorporating an aspect-ratio-trapping technique. | 11-06-2014 |
20140374798 | Lattice-Mismatched Semiconductor Structures with Reduced Dislocation Defect Densities and Related Methods for Device Fabrication - Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures. | 12-25-2014 |