Patent application number | Description | Published |
20130042032 | Dynamic resource allocation for transaction requests issued by initiator devices to recipient devices - Initiator devices for generating transaction requests and recipient devices for receiving them are disclosed. The recipient devices accept transaction requests where there is available buffer storage for the transaction request. If there is no storage space available an acknowledgement signal generator generates and outputs a reject acknowledgement signal indicating a request has been received but has not been accepted by the recipient device. A credit generator can reserve at least one available storage location in the buffer and generate a credit grant for an initiator device that sent one of the transaction requests that was not accepted by the recipient device. The credit grant indicates to the initiator device that there is at least one reserved storage location, such that a subsequent transaction request from the initiator device will be accepted by the recipient device. Thus, the initiator device may not transmit the transaction request again until it has received the credit grant, whereupon it may transmit it along with a credit grant indicator such that it is sure that it will be accepted. | 02-14-2013 |
20130042034 | SYNCHRONISATION OF DATA PROCESSING SYSTEMS - A centralised synchronising device for determining progress of at least a subset of transaction requests that are transmitted through a data processing system in response to receipt of a system synchronising request, the data processing system having a plurality of devices including a plurality of transaction request generating devices for generating the transaction requests and a plurality of recipient devices for receiving the transaction requests, the synchronising device and at least one interconnect for interconnecting at least some of the devices; wherein the system synchronising request comprising a request generated by one of the plurality of transaction generating devices and querying progress of the at least a subset of the transaction requests;
| 02-14-2013 |
20130042070 | Shared cache memory control - A data processing system | 02-14-2013 |
20130042077 | Data hazard handling for copending data access requests - A data processing system that manages data hazards at a coherency controller and not at an initiator device is disclosed. The data processing system process write requests in a two part form, such that a first part is transmitted and when the coherency controller has space to accept data it responds to the first part and the data and state of the data prior to the write are sent as a second part of the write request. When there are copending reads and writes to the same address the writes are stalled by the coherency controller by not responding to the first part of the write and the initiator device proceeds to process any snoop requests received to the address of the write regardless of the fact that the write is pending. When the pending read has completed the coherency controller will respond to the first part of the write and the initiator device will complete the write by sending the data and an indicator of the state of the data following the snoop. The coherency controller can then avoid any potential data hazard using this information to update memory as required. | 02-14-2013 |
20130042078 | Snoop filter and non-inclusive shared cache memory - A data processing apparatus | 02-14-2013 |
20130042249 | Processing resource allocation within an integrated circuit supporting transaction requests of different priority levels - An integrated circuit | 02-14-2013 |
20130042252 | Processing resource allocation within an integrated circuit - An integrated circuit | 02-14-2013 |
20150012713 | DATA PROCESSING APPARATUS HAVING FIRST AND SECOND PROTOCOL DOMAINS, AND METHOD FOR THE DATA PROCESSING APPARATUS - A data processing apparatus ( | 01-08-2015 |