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Jaehyung

Jaehyung Kim, Yongin-Si KR

Patent application numberDescriptionPublished
20100141141Display filter, display device including the same, and method of manufacturing the same - A display filter includes a base layer having a plurality of structures, the plurality of structures being projected from a first surface of the base layer, an external light shielding layer on the plurality of structures, the external layer being on an upper surface and on a first side surface of the structures, and an electromagnetic wave shielding layer on the plurality of structures, the electromagnetic wave shielding layer being on the upper surface and on a second side surface of the structures, the first and second side surfaces of the structures being opposite each other, and a portion of the external light shielding layer being between the structures and a portion of the electromagnetic wave shielding layer.06-10-2010
20100164358FILTER FOR PLASMA DISPLAY AND FABRICATING METHOD THEREOF - A filter for a plasma display includes an electromagnetic interference shielding mesh formed on a substrate to shield electromagnetic waves and a hard coating layer made of inorganic material formed on the electromagnetic interference shielding mesh. The filter is fabricated so as to provide a reduced thickness of a plasma display, to prevent cracks from being generated on surfaces of the mesh and to reduce manufacturing costs.07-01-2010
20100165456FILTER FOR PLASMA DISPLAY - A filter for a plasma display includes: a transparent substrate having a first surface and a second surface opposite to the first surface; a first external light shielding layer having a first pattern disposed on the first surface of the transparent substrate and having a mesh structure to shield electromagnetic waves and external light and a filter layer covering the first pattern and the first surface of the transparent substrate; a second external light shielding layer having a second pattern corresponding to the first pattern and formed on the filter layer to shield external light and an overcoating layer covering the second pattern and the filter layer; and a third external light shielding layer having a third pattern corresponding to the second pattern and formed on the overcoating layer to shield external light and a hard coating layer covering the third pattern to protect the third pattern.07-01-2010

Jaehyung Lee, Seoul KR

Patent application numberDescriptionPublished
20090253402Systems for tracking kidnapped hostage tracking systems, Transmitters used in the same, Sensor network gateways used in the same, and methods of tracking kidnapped hostage - A system for tracking location of person having signal transmitter includes at least one receiver for receiving unique ID signal transmitted by signal transmitter that transmits ID signal uniquely determined for respective mobile signal transmitter at at least one predetermined period. The receiver receives unique ID signal near circumference of the person having signal transmitter spaced apart from the receiver by given distance, and stores the received unique ID signal in ID store unit. The receiver, when search request for specific ID is received from external server, searches for the requested ID in ID store unit and transmits transmission information including ID corresponding to requested ID to external server. The person, such as abducted person, has only small signal transmitter, and thus the current location of the abducted person and path along which the abducted person moved can be tracked using the signal continually transmitted by the signal transmitter.10-08-2009
20100169032WIRELESS SENSOR NETWORK SYSTEMS, METHOD FOR PLACING A PLURALITY OF SENSOR NODES IN WIRELESS SENSOR NETWORK SYSTEM, AND METHODS FOR COMPUTING SENSING ENERGY CONSUMPTION PER AREA OF A PLURALITY OF SENSOR NODES - A wireless sensor network system, a method for placing a plurality of sensor nodes in a wireless sensor network, and a method for computing sensing energy consumption per area of a plurality of sensor node are disclosed. The wireless sensor network system includes a plurality of sensor nodes which are deployed at the same distance in a two-dimensional plane and have sensing areas of the same size, and an extra sensor node which has a sensing area of a smaller size than the size of the sensor nodes to sense a gap area which is not covered by the sensing areas of the sensor nodes.07-01-2010

Jaehyung Lee, Gyeonggi-Do KR

Patent application numberDescriptionPublished
20090154256Integrated Circuit Memory Devices Including Delayed Clock Inputs for Input/Output Buffers and Related Systems and Methods - A memory system may include an integrated circuit memory device and a memory controller coupled to the integrated circuit memory device. The integrated circuit memory device may include a memory cell array having a plurality of memory cells, a clock generator configured to generate a clock signal, a plurality of data input/output buffers, and a delay circuit. The plurality of data input/output buffers may be coupled between respective data input/output pads and the memory cell array, and each of the data input/output buffers may be configured to communicate data with the memory cell array responsive to the clock signal with the clock signal being applied to a clock input of each of the input/output buffers. The delay circuit may be coupled between the clock generator and a first one of the data input/output buffers so that the clock signal is delayed by different amounts at clock inputs of the first data input/output buffer and a second one of the data input/output buffers. Moreover, the memory controller may be configured to perform data training. Related methods and memory devices are also discussed.06-18-2009
20090179700AC Coupling Circuits Including Resistive Feedback and Related Methods and Devices - An integrated circuit device may include an amplifier having an amplifier input configured to receive an input signal with the amplifier being configured to provide an amplifier output signal at an amplifier output responsive to the input signal received at the amplifier input. A capacitor may be coupled to the amplifier output, and a buffer may be coupled to the capacitor so that the capacitor is coupled in series between the amplifier output and an input of the buffer with an output of the buffer being coupled to a buffered signal terminal. A variable resistive feedback circuit may be coupled between the input and output of the buffer with the variable resistive feed back circuit providing a variable resistance between the input and output of the buffer. A feedback resistance controller may be coupled to the variable resistive feedback circuit with the feedback resistance controller being configured to select a first resistance for the variable resistive feedback circuit for a first frequency of the input signal and to select a second resistance for the variable resistive feedback circuit for a second frequency of the input signal different than the first frequency with the first and second resistances being different.07-16-2009