| Patent application number | Description | Published |
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| 20080259903 | Error control method, medium access control (MAC) frame designing method, and terminal registration method in wireless communication system, and recording medium - The MAC frame in a wireless communication system includes a terminal ID allocated to each of multiple terminals. At least one connection ID is allocated to each terminal having the terminal ID, and sub-carrier allocation information is allocated to each connection having the connection ID. The sub-carrier allocation information includes a sub-carrier allocation status for each sub-carrier, and the number of allocated information bits for each sub-carrier. The sub-carrier allocation status and the number of allocated information bits for each sub-carrier can be allocated, by sub-carriers, to the sub-carrier allocation information using a same number of bits; or the information on the sub-carrier allocation status is first allocated to the sub-carrier allocation information and the number of allocated information bits for each sub-carrier is allocated. | 10-23-2008 |
| 20080316967 | Error control method, medium access control (MAC) frame designing method, and terminal registration method in wireless communication system, and recording medium - The MAC frame in a wireless communication system includes a terminal ID allocated to each of multiple terminals. At least one connection ID is allocated to each terminal having the terminal ID, and sub-carrier allocation information is allocated to each connection having the connection ID. The sub-carrier allocation information includes a sub-carrier allocation status for each sub-carrier, and the number of allocated information bits for each sub-carrier. The sub-carrier allocation status and the number of allocated information bits for each sub-carrier can be allocated, by sub-carriers, to the sub-carrier allocation information using a same number of bits; or the information on the sub-carrier allocation status is first allocated to the sub-carrier allocation information and the number of allocated information bits for each sub-carrier is allocated. | 12-25-2008 |
| 20090010149 | VIRTUAL MULTI-ANTENNA METHOD FOR OFDM SYSTEM AND OFDM-BASED CELLULAR SYSTEM - Provided are a virtual multi-antenna method for an orthogonal frequency division multiplexing (OFDM) system and an OFDM-based cellular system. The virtual multi-antenna method includes grouping sub-carriers in a frequency domain of an OFDM symbol and generating at least one group including G sub-carriers; and regarding the G sub-carriers included in the at least one group as multiple channels used in a multi-antenna technique and virtually applying the multi-antenna technique to the transmission and reception of the OFDM symbol. The virtual multi-antenna method can effectively reduce an interference signal and obtain the effects of a spatial division multiple access (SDMA) technique without physically using multiple antennas. | 01-08-2009 |
| 20090116425 | ERROR CONTROL METHOD, MEDIUM ACCESS CONTROL (MAC) FRAME DESIGNING METHOD, AND TERMINAL REGISTRATION METHOD IN WIRELESS COMMUNICATION SYSTEM, AND RECORDING MEDIUM - In a method of registering with an access point in a terminal of a wireless communication system, a frame includes a downlink sub-frame including a broadcast interval and a first management connection interval, and an uplink sub-frame including an access interval and a second management connection interval, the broadcast interval being used for transmitting a map message, the method includes: sending a first ranging request message to the access point using the access interval; receiving allocation information of a ranging slot from the access point using the map message; performing ranging through the ranging slot; sending a registration request message to the access point using the second management connection interval; and receiving information on whether to permit the registering from the access point using the first management connection interval. | 05-07-2009 |
| 20100146610 | NODE AUTHENTICATION AND NODE OPERATION METHODS WITHIN SERVICE AND ACCESS NETWORKS IN NGN ENVIRONMENT - Provided are node authentication and node operation methods within service and access networks for bundle authentication between the service and access networks in a next generation network (NGN). A method of authentication processing of a node (S-CSC-FE/I-CSC-FE (Serving Call Session Control Functional Entity/Interrogating Call Session Control Functional Entity)) within a service network for bundle authentication between service and access networks, the method including: receiving first authentication information about access authentication of a terminal from a first node within the service networks; requesting to receive second authentication information from a second node within the service network based on the first authentication information; and comparing the first authentication information with the second authentication information to authenticate the terminal. | 06-10-2010 |
| 20110002465 | INTEGRATED HANDOVER AUTHENTICATING METHOD FOR NEXT GENERATION NETWORK (NGN) WITH WIRELESS ACCESS TECHNOLOGIES AND MOBILE IP BASED MOBILITY CONTROL - Integrated handover authentication technology for a next generation network (NGN) environment to which wire-less access technology and mobile IP based mobility control technology are applied is provided. In a method of operating a mobile terminal MN in order to perform the integrated handover authentication in the NGN environment including an access router PAR, a target router NAR, and an authentication(AAA) server. First, a handover authentication key HK | 01-06-2011 |
| Patent application number | Description | Published |
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| 20100117141 | Memory cell transistors having limited charge spreading, non-volatile memory devices including such transistors, and methods of formation thereof - In one aspect, a transistor comprises: a substrate body; a tunnel oxide layer on the body; a charge trapping layer on the tunnel oxide layer; a blocking layer on the charge trapping layer; a control gate on the blocking layer, the control gate having first and second sidewalls, the first and second sidewalls being spaced apart from each other by a first distance; and charge confinement features on the body, the charge confinement features being spaced apart from each other by a second distance that is greater than or substantially equal to the first distance, the charge confinement features suppressing or preventing migration of charge present in the charge trapping layer. | 05-13-2010 |
| 20100210116 | METHODS OF FORMING VAPOR THIN FILMS AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICES INCLUDING THE SAME - A method of forming a vapor thin film is provided, which includes loading a substrate into a chamber, adsorbing a source gas on the substrate by supplying the source gas into the chamber, and forming the thin film on the substrate by supplying a reaction gas into the chamber, wherein the forming of the thin film on the substrate is proceeded under an electric field formed in one direction on the substrate by applying a bias to the substrate. | 08-19-2010 |
| 20100240207 | METHODS OF MANUFACTURING CHARGE TRAP TYPE MEMORY DEVICES - Manufacturing of a charge trap type memory device can include forming a tunnel insulating layer on a substrate. A charge-trapping layer can be formed on the tunnel insulating layer. A blocking layer can be formed on the charge-trapping layer. Gate electrodes can be formed on the blocking layer and divided by a trench. A portion of the charge-trapping layer aligned with the trench may be converted into a charge-blocking pattern with a vertical side profile by an anisotropic oxidation process. | 09-23-2010 |
| 20100248465 | METHODS OF FABRICATING SILICON OXIDE LAYERS USING INORGANIC SILICON PRECURSORS AND METHODS OF FABRICATING SEMICONDUCTOR DEVICES INCLUDING THE SAME - Methods of fabricating a silicon oxide layer using an inorganic silicon precursor and methods of fabricating a semiconductor device using the same are provided. The methods of fabricating a semiconductor device include forming a tunnel insulating layer and a charge storage layer on a substrate; forming a dielectric layer structure on the charge storage layer using an atomic layer deposition (ALD) method, the dielectric layer structure including a first dielectric layer formed of silicon oxide, a second dielectric layer on the first dielectric layer formed of a material different from the material forming the first dielectric layer, and a third dielectric layer formed of the silicon oxide on the second dielectric layer; and forming a control gate on the dielectric layer structure. The first and third dielectric layers formed of the silicon oxide are formed using a first gas including an inorganic silicon precursor, a second gas including hydrogen gas or a hydrogen component, and a third gas including an oxide gas. | 09-30-2010 |
