| Patent application number | Description | Published |
|---|
| 20080204388 | Liquid crystal display device having time controller and source driver - A liquid crystal display (LCD) apparatus includes a time controller and a plurality of source drivers. The time controller may receive first data, and output a plurality of clock signals and a plurality of pieces of second data to display the first data. The plurality of source drivers may receive the plurality of pieces of second data and the plurality of clock signals from the time controller, convert the plurality of pieces of second data to a plurality of pieces of analog data, and output the plurality of pieces of analog data to a display panel. The time controller may be connected to the plurality of source drivers in a point-to-point fashion. The second data have a packet data format. | 08-28-2008 |
| 20090207118 | DATA DRIVING UNIT AND LIQUID CRYSTAL DISPLAY - A data driving unit and a liquid crystal display (LCD) are provided. The data driving unit includes a first buffer, a second buffer, a charge sharing switch connected between an output terminal of the first buffer and an output terminal of the second buffer, and a controller configured to compare a previous line-time data pattern with a current line-time data pattern and generate a control signal for controlling a switching operation of the charge sharing switch according to a comparison result. | 08-20-2009 |
| 20090322737 | Gate Driver, Method of Driving the Gate Driver, and Display Panel Driving Apparatus Including the Gate Driver - A display panel driving apparatus and a method of driving the same are provided, and, in particular, a gate driver and a method of driving the gate driver. The gate driver includes a decoder that decodes gate line selection data and that generates a gate line selection signal. A gate driving circuit generates a gate driving signal in a pre-charging phase and a driving phase in response to the gate line selection signal and a pre-charging control signal that controls an off-state of non-selected gate lines. In a time period of the driving phase in which a gate line is not selected, a node that has been in a floating state is held to a target voltage level in response to a hold control signal. The hold control signal is generated based upon a timing relationship between the gate line selection signal and the pre-charging control signal. | 12-31-2009 |
| 20100131688 | INTERFACE METHOD FOR DATA TX/RX SYSTEM USING DATA STREAM - An interface method for a data transmitting and receiving system including a transmitter and a receiver includes; resetting the receiver in response to a data stream communicated from the transmitter or upon detecting power-up of the transmitter or receiver, and operating the receiver in response to a current data stream received from the transmitter, wherein the operating of the receiver comprises at least one of; (a) updating data stored in the receiver according to control data contained in the current data stream, and (b) receiving payload data contained in the current data stream. | 05-27-2010 |
| 20100134467 | SYSTEM AND METHOD FOR TRANSMITTING AND RECEIVING SIGNALS - A system for transmitting and receiving a signal includes a transmitter that switches a first reference voltage and a second reference voltage and generates first and second voltage signals, and a receiver the receives the first and second voltage signals. The transmitter includes a reference voltage generator that generates the first reference voltage and the second reference voltage, and a switch block that switches the first reference voltage and the second reference voltage and outputs the first and second voltage signals. The receiver includes a resistor having two terminals to which the first and second voltage signals are applied. | 06-03-2010 |
| 20110037758 | CLOCK AND DATA RECOVERY CIRCUIT OF A SOURCE DRIVER AND A DISPLAY DEVICE - A clock and data recovery (CDR) circuit of a source driver includes a clock recovery unit and a delay locked loop unit. The clock recovery unit receives data bits and a clock code periodically inserted into the data bits through a clock embedded data channel in a display data mode, and is configured to generate a clock signal by detecting an edge of the clock code. The delay locked loop unit is configured to generate a multi-phase clock signal based on the clock signal in the display data mode. | 02-17-2011 |
| 20110194590 | TRANSCEIVER HAVING EMBEDDED CLOCK INTERFACE AND METHOD OF OPERATING TRANSCEIVER - A transceiver comprises a transmitter that converts a plurality of data components into serial data in response to a first clock signal and transmits the serial data, and a receiver that receives the serial data and converts the serial data into the plurality of data components in response to a second clock signal generated from the serial data. The transmitter adds at least one dummy bit to the serial data at predetermined intervals. The at least one dummy bit includes information regarding a data type of the plurality of data components. | 08-11-2011 |
| 20110292024 | Mode Conversion Method, And Display Driving Integrated Circuit And Image Processing System Using The Method - According to an example embodiment, a display driving integrated circuit (IC) includes a timing controller and a plurality of source drivers. The timing controller is configured to output a plurality of signals to the plurality of source drivers, and at least one of the timing controller and the plurality of source drivers operates in a power down mode in at least one of an initializing period, a data transmission period, and a vertical blank period. According to an example embodiment, a mode conversion method used in a display driving IC includes switching between a normal mode to a power down mode in response to a standby control signal. The power down mode is implemented on at least one of a timing controller and a plurality of source drivers included in the display driving IC in at least one of an initializing period, a data transmission period, and a vertical blank period. | 12-01-2011 |
