| Patent application number | Description | Published |
|---|
| 20090072407 | THERMO-COMPRESSION BONDED ELECTRICAL INTERCONNECT STRUCTURE AND METHOD - An electrical structure and method for forming. The electrical structure includes a first substrate comprising a first electrically conductive pad, a second substrate comprising a second electrically conductive pad, and an interconnect structure electrically and mechanically connecting the first electrically conductive pad to the second electrically conductive pad. The interconnect structure comprises a non-solder metallic core structure and a first solder structure. The first solder structure electrically and mechanically connects a first portion of the non-solder metallic core structure to the first electrically conductive pad. A second portion of the non-solder metallic core structure is thermo-compression bonded to the second electrically conductive pad. | 03-19-2009 |
| 20090075469 | THERMO-COMPRESSION BONDED ELECTRICAL INTERCONNECT STRUCTURE AND METHOD - An electrical structure and method for forming electrical interconnects. The method includes positioning a sacrificial carrier substrate such that a first surface of a non-solder metallic core structure within the sacrificial carrier substrate is in contact with a first electrically conductive pad. The first surface is thermo-compression bonded to the first electrically conductive pad. The sacrificial carrier substrate is removed from the non-solder metallic core structure. A solder structure is formed on a second electrically conductive pad. The first substrate comprising the non-solder metallic core structure is positioned such that a second surface of the non-solder metallic core structure is in contact with the solder structure. The solder structure is heated to a temperature sufficient to cause the solder structure to melt and form an electrical and mechanical connection between the second surface of the non-solder metallic core structure and the second electrically conductive pad. | 03-19-2009 |
| 20090093111 | SPROCKET OPENING ALIGNMENT PROCESS AND APPARATUS FOR MULTILAYER SOLDER DECAL - A process for aligning at least two layers in an abutting relationship with each other comprises forming a plurality of sprocket openings in each of the layers for receiving a sprocket of diminishing diameters as the sprocket extends outwardly from a base, with the center axes of the sprocket openings in each layer being substantially alignable with one another, the diameter of the sprocket openings in an abutting layer for first receiving the sprocket being greater than the diameter of the sprocket openings in an abutted layer. This is followed by forming a plurality of reservoir openings in each of at least two of the layers and positioning the sprocket openings in the layers to correspond with one another and the reservoir openings in the layers to correspond with one another so that substantial alignment of the center axes of the corresponding sprocket openings in the layers effects substantial alignment of the center axes of the corresponding reservoir openings in the layers. Engaging the sprocket openings with the sprocket by inserting the end of the sprocket having the smallest diameter into the sprocket openings having the largest diameter in the layers and continuing through to the sprocket opening having the smallest diameter in the layers effects substantial alignment of the center axes of the corresponding sprocket openings and substantial alignment of the center axes of the corresponding reservoir openings in the layers. The invention also comprises apparatus-for performing this process. | 04-09-2009 |
| 20090197103 | MODIFICATION OF PB-FREE SOLDER ALLOY COMPOSITIONS TO IMPROVE INTERLAYER DIELECTRIC DELAMINATION IN SILICON DEVICES AND ELECTROMIGRATION RESISTANCE IN SOLDER JOINTS - A solder joint comprising a solder capture pad on a substrate having a circuit; and a lead free solder selected from the group comprising Sn—Ag—Cu solder and Sn—Ag solder adhered to the solder capture pad; the solder selected from the group comprising between 0.1 to 2.0% by weight Sb or Bi, and 0.5 to 3.0% Ag. Formation of voids at an interface between the solder and the solder capture pad is suppressed, by including Zn. Interlayer dielectric delamination is suppressed, and electromigration characteristics are greatly improved. Methods for forming solder joints using the solders. | 08-06-2009 |
| 20090197114 | MODIFICATION OF PB-FREE SOLDER ALLOY COMPOSITIONS TO IMPROVE INTERLAYER DIELECTRIC DELAMINATION IN SILICON DEVICES AND ELECTROMIGRATION RESISTANCE IN SOLDER JOINTS - A solder joint comprising a solder capture pad on a substrate having a circuit; and a lead free solder selected from the group comprising Sn—Ag—Cu solder and Sn—Ag solder adhered to the solder capture pad; the solder selected from the group comprising between 0.1 to 2.0% by weight Sb or Bi, and 0.5 to 3.0% Ag. Formation of voids at an interface between the solder and the solder capture pad is suppressed, by including Zn. Interlayer dielectric delamination is suppressed, and electromigration characteristics are greatly improved. Methods for forming solder joints using the solders. | 08-06-2009 |
| 20090283575 | TECHNIQUES FOR ARRANGING SOLDER BALLS AND FORMING BUMPS - A mask having a plurality of through holes and a mold having a plurality of cavities are provided, and the through holes and the cavities are aligned. Conductive balls ale dispensed into the aligned through holes and cavities Substantially one ball is dispensed into each aligned through hole and cavity, and the mask with the holes and the cavities in the mold ale configured and dimensioned such that the balls are substantially flush with, or recessed below, an outer surface of the mask. The mask is removed, the conductive balls are aligned with pads of a semiconductor device, and the conductive balls are transferred to the pads by fluxless reflow in a formic acid environment. Vibrational, electrostatic, and direct transfer aspects are also disclosed. | 11-19-2009 |
| 20090302095 | TECHNIQUES FOR ARRANGING SOLDER BALLS AND FORMING BUMPS - A mask having a plurality of through holes and a mold having a plurality of cavities are provided, and the through holes and the cavities are aligned. Conductive balls are dispensed into the aligned through holes and cavities. Substantially one ball is dispensed into each aligned through hole and cavity, and the mask with the holes and the cavities in the mold are configured and dimensioned such that the balls are substantially flush with, or recessed below, an outer surface of the mask. The mask is removed, the conductive balls are aligned with pads of a semiconductor device, and the conductive balls are transferred to the pads by fluxless reflow in a formic acid environment. Vibrational, electrostatic, and direct transfer aspects are also disclosed. | 12-10-2009 |
| 20090302096 | TECHNIQUES FOR ARRANGING SOLDER BALLS AND FORMING BUMPS - A mask having a plurality of through holes and a mold having a plurality of cavities are provided, and the through holes and the cavities are aligned. Conductive balls are dispensed into the aligned through holes and cavities. Substantially one ball is dispensed into each aligned through hole and cavity, and the mask with the holes and the cavities in the mold are configured and dimensioned such that the balls are substantially flush with, or recessed below, an outer surface of the mask. The mask is removed, the conductive balls are aligned with pads of a semiconductor device, and the conductive balls are transferred to the pads by fluxless reflow in a formic acid environment. Vibrational, electrostatic, and direct transfer aspects are also disclosed. | 12-10-2009 |
| 20100025862 | Integrated Circuit Interconnect Method and Apparatus - Techniques for interconnecting an IC chip and a receiving substrate are provided. A method includes the steps of: providing the IC chip, the IC chip including at least a first connection site formed thereon; providing the receiving substrate, the receiving substrate including at least a second connection site formed thereon; forming an alloy structure on at least a portion of an upper surface of the second connection site; orienting the IC chip relative to the receiving substrate so that the at least first connection site is aligned with the alloy deposit formed on the at least second connection site; and forming an electrical connection between the first and second connection sites, the electrical connection comprising a volume of electrically conductive fusible material, wherein a majority of the volume of electrically conductive fusible material is supplied from the alloy structure. | 02-04-2010 |
| 20100025863 | Integrated Circuit Interconnect Method and Apparatus - Techniques for interconnecting an IC chip and a receiving substrate are provided. A method includes the steps of: providing the IC chip, the IC chip including at least a first connection site formed thereon; providing the receiving substrate, the receiving substrate including at least a second connection site formed thereon; forming an alloy structure on at least a portion of an upper surface of the second connection site; orienting the IC chip relative to the receiving substrate so that the at least first connection site is aligned with the alloy deposit formed on the at least second connection site; and forming an electrical connection between the first and second connection sites, the electrical connection comprising a volume of electrically conductive fusible material, wherein a majority of the volume of electrically conductive fusible material is supplied from the alloy structure. | 02-04-2010 |
| 20100028612 | Method and Apparatus for Forming Planar Alloy Deposits on a Substrate - A method for forming alloy deposits at selected areas on a receiving substrate includes the steps of: providing an alloy carrier including at least a first decal including a first plurality of openings and a second decal including a second plurality of openings, the first and second decals being arranged such that each of the first plurality of openings is in alignment with a corresponding one of the second plurality of openings; filling the first and second plurality of openings with molten alloy; cooling the molten alloy to thereby form at least first and second plugs, the first plug having a first surface and a second surface substantially parallel to one another, the second plug having a third surface and a fourth surface substantially parallel to one another; removing at least one of the first and second decals to at least partially expose the first and second plugs; aligning the alloy carrier with the receiving substrate so that the first and second plugs correspond to the selected areas on the receiving substrate; and transferring the first plug to a first of the selected areas and the second plug to a second of the selected areas. | 02-04-2010 |
| 20100072263 | Method and Apparatus for Forming Planar Alloy Deposits on a Substrate - A method for forming alloy deposits at selected areas on a receiving substrate includes the steps of: providing an alloy carrier including at least a first decal including a first plurality of openings and a second decal including a second plurality of openings, the first and second decals being arranged such that each of the first plurality of openings is in alignment with a corresponding one of the second plurality of openings; filling the first and second plurality of openings with molten alloy; cooling the molten alloy to thereby form at least first and second plugs, the first plug having a first surface and a second surface substantially parallel to one another, the second plug having a third surface and a fourth surface substantially parallel to one another; removing at least one of the first and second decals to at least partially expose the first and second plugs; aligning the alloy carrier with the receiving substrate so that the first and second plugs correspond to the selected areas on the receiving substrate; and transferring the first plug to a first of the selected areas and the second plug to a second of the selected areas. | 03-25-2010 |
| 20100116871 | INJECTION MOLDED SOLDER METHOD FOR FORMING SOLDER BUMPS ON SUBSTRATES - A flexible unitary mask has a plurality of through holes. A substrate has a plurality of wettable pads in recessed regions defining volumes. The through holes are aligned with the wettable pads. Molten solder is directly injected through the through holes of the flexible unitary mask into the volumes with the wettable pads, such that the through holes and the volumes with the wettable pads are filled with solder. The solder is allowed to solidify, forming a plurality of solder structures adhered to the wettable pads. The flexible unitary mask is peeled from the substrate after the solder has solidified. | 05-13-2010 |
| 20100224670 | MICRO-FLUIDIC INJECTION MOLDED SOLDER (IMS) - A portion of compliant material includes four walls defining a slot. The slot has a relatively large cross-section end in fluid communication with a solder reservoir, and also has a relatively small cross-section end opposed to the relatively large cross-section end. The slot has a generally elongate rectangular shape when viewed in plan, with a length perpendicular to a scan direction, a width, parallel to the scan direction, associated with the relatively large cross section end, and a width, parallel to the scan direction, associated with the relatively small cross section end. The slot is configured in the portion of compliant material such that the relatively small cross-section end of the slot normally remains substantially closed, but locally opens sufficiently to dispense solder from the reservoir when under fluid pressure and locally unsupported by a workpiece. Methods of operation and fabrication are also disclosed. | 09-09-2010 |
| 20110049221 | METHOD OF JOINING A CHIP ON A SUBSTRATE - A method and apparatus for making chip assemblies is disclosed that prevent or reduce the cracking and delamination of ultra low-k dielectrics in the back-end-of-line in Si chips that can occur during the chip assembly process. The method and apparatus apply pressure to the top and bottom surfaces of a substrate during the chip bonding process so that the bending and warping of the assembled modules are reduced. The reduced bending and warping prevent or reduce the cracking and delamination of ultra low-k dielectrics. | 03-03-2011 |
| 20110095431 | THERMO-COMPRESSION BONDED ELECTRICAL INTERCONNECT STRUCTURE - An electrical structure and method for forming. The electrical structure includes a first substrate comprising a first electrically conductive pad, a second substrate comprising a second electrically conductive pad, and an interconnect structure electrically and mechanically connecting the first electrically conductive pad to the second electrically conductive pad. The interconnect structure comprises a non-solder metallic core structure and a first solder structure. The first solder structure electrically and mechanically connects a first portion of the non-solder metallic core structure to the first electrically conductive pad. A second portion of the non-solder metallic core structure is thermo-compression bonded to the second electrically conductive pad. | 04-28-2011 |
| 20110127312 | Injection Molded Solder Method for Forming Solder Bumps on Substrates - A flexible unitary mask has a plurality of through holes. A substrate has a plurality of wettable pads in recessed regions defining volumes. The through holes are aligned with the wettable pads. Molten solder is directly injected through the through holes of the flexible unitary mask into the volumes with the wettable pads, such that the through holes and the volumes with the wettable pads are filled with solder. The solder is allowed to solidify, forming a plurality of solder structures adhered to the wettable pads. The flexible unitary mask is peeled from the substrate after the solder has solidified. | 06-02-2011 |
