Patent application number | Description | Published |
20110177639 | METHOD FOR MANUFACTURING A THIN FILM TRANSISTOR ARRAY PANEL - A thin film transistor display panel includes gate wiring formed on an insulation substrate and including gate lines, and gate electrodes and gate pads connected to the gate lines; a gate insulation layer covering the gate wiring; a semiconductor pattern formed over the gate insulation layer; data wiring formed over the gate insulation layer or the semiconductor pattern and including source electrodes, drain electrodes, and data pads; a protection layer including a Nega-PR type of organic insulating layer formed all over the semiconductor pattern and the data wiring, wherein the thickness of the Nega-PR type of organic insulating layer in both the gate and data pad regions is smaller than in the other regions; and a pixel electrode connected to the drain electrode. When exposing the Nega-PR type of passivation layer in the pad region during a photolithography process, a photomask having a lattice pattern made of a metal such as Cr that has a line width of less than the resolution of a light exposer is used. Thus, the resulting post-etch height of the passivation layer can be selectively controlled so as to provide reduced effective thickness in the pad regions. | 07-21-2011 |
20110254815 | THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME - A manufacturing method of a thin film transistor array panel includes forming a gate line, forming a gate insulating layer on the gate line, forming a data line including a drain electrode on the gate insulating layer, forming a passivation layer on the gate insulating layer, the data line, and the drain electrode, forming a negative photosensitive organic layer on the passivation layer, heat treating the negative photosensitive organic layer to form an insulating layer including a first portion, and a second portion that is thinner than the first portion, and forming a pixel electrode, a first contact assistant, and a second contact assistant on the insulating layer. The pixel electrode is disposed on the first portion, the first and second contact assistants are disposed on the second portion, and the thickness of the second portion is less than about 1.5 micrometers (μm). | 10-20-2011 |
20120154722 | DISPLAY SUBSTRATE, METHOD OF MANUFACTURING THE SAME, AND DISPLAY PANEL HAVING THE SAME - A display panel includes a base substrate having a plurality of pixel areas, in which each pixel area includes a plurality of sub-pixel areas, a light blocking layer pattern generally defining the sub-pixel areas, and a plurality of color filter patterns. Upper surfaces of the light blocking layer pattern and the plurality of color filter patterns collectively form a generally flat surface. | 06-21-2012 |
20130075736 | THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF - A thin film transistor array panel includes: an substrate; a gate line and a gate pad portion disposed on the substrate; a gate insulating layer disposed on the gate line and the gate pad portion; a data line and a data pad portion disposed on the gate insulating layer; a gate assistance pad portion disposed at a position corresponding to the gate pad portion; a first insulating layer disposed on the data line and removed at the gate pad portion and the data pad portion; a first field generating electrode disposed on the first insulating layer; a second insulating layer disposed on the first field generating electrode and removed at the gate pad portion and the data pad portion; and a second field generating electrode disposed on the second insulating layer. The assistance gate pad portion and the gate insulating layer include a contact hole exposing the gate pad portion. | 03-28-2013 |
20130140570 | THIN FILM TRANSISTOR ARRAY PANEL - A thin film transistor array panel includes an insulation substrate; a gate line on the insulation substrate; a gate insulating layer on the gate line; a data line on the gate insulating layer; a first insulating layer on the data line and including a first contact hole which exposes a portion of the data line; a first connection assistant member in the first contact hole; and further including a first field generating electrode on the first insulating layer. The first field generating electrode is in connection with the exposed portion of the data line through the first connection assistant member. | 06-06-2013 |
20130240889 | THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME - A manufacturing method of a thin film transistor array panel includes forming a gate line, forming a gate insulating layer on the gate line, forming a data line including a drain electrode on the gate insulating layer, forming a passivation layer on the gate insulating layer, the data line, and the drain electrode, forming a negative photosensitive organic layer on the passivation layer, heat treating the negative photosensitive organic layer to form an insulating layer including a first portion, and a second portion that is thinner than the first portion, and forming a pixel electrode, a first contact assistant, and a second contact assistant on the insulating layer. The pixel electrode is disposed on the first portion, the first and second contact assistants are disposed on the second portion, and the thickness of the second portion is less than about 1.5 micrometers (μm). | 09-19-2013 |
20140140153 | REPAIR CONTROL CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME - A repair control circuit of controlling a repair operation of a semiconductor memory device includes a row matching block and a column matching block. The row matching block stores fail group information indicating one or more fail row groups among a plurality of row groups. The row groups are determined by grouping a plurality of row addresses corresponding to a plurality of wordlines. The row matching block generates a group match signal based on input row address and the fail group information, such that the group match signal indicates the fail row group including the input row address. The column matching block stores fail column addresses of the fail memory cells, and generates a repair control signal based on input column address, the group match signal and the fail column addresses, such that the repair control signal indicates whether the repair operation is executed or not. | 05-22-2014 |
20140176893 | DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME - A display device according to an exemplary embodiment of the present invention includes a substrate including a plurality of pixel regions, a thin film transistor disposed on the substrate, and a pixel electrode connected to the thin film transistor and disposed in a first pixel region. A roof layer is disposed on the pixel electrode and spaced apart from the pixel electrode with a microcavity interposed therebetween. The plurality of pixel regions is disposed in a matrix form including a plurality of pixel rows and a plurality of pixel columns, the roof layer is disposed along the plurality of pixel rows, and the roof layer includes a bridge portion connecting the roof layers disposed in different pixel rows. | 06-26-2014 |
20140183162 | PHOTORESIST COMPOSITION AND METHOD FOR FORMING A METAL PATTERN - A method of forming a metal pattern is disclosed. In the method, a metal layer is formed on a base substrate. A photoresist composition is coated on the metal layer to form a coating layer. The photoresist composition includes a binder resin, a photo-sensitizer and a mixed solvent including a first solvent, a second solvent having a higher volatility than the first solvent, and a third solvent having a higher volatility than the second solvent. The coating layer is exposed to light. The coating layer is partially removed to form a photoresist pattern. The metal layer is patterned by using the photoresist pattern as a mask. | 07-03-2014 |
20140241093 | DEVICES, SYSTEMS AND METHODS WITH IMPROVED REFRESH ADDRESS GENERATION - A refresh address generator may include a lookup table including a first portion storing a first group of addresses associated with a first data retention time, and a second portion storing a second group of addresses associated with a second data retention time different from the first data retention time, wherein the addresses of the first portion are more frequently accessed than the addresses of the second portion to refresh the memory cells corresponding to the addresses. Systems and methods may also implement such refresh address generation. | 08-28-2014 |
20140327866 | PHOTOSENSITIVE RESIN COMPOSITION, METHOD OF FORMING PATTERN, AND LIQUID CRYSTAL DISPLAY USING THE SAME - A photosensitive resin composition is disclosed. The disclosed photosensitive resin composition includes an acryl-based copolymer formed by copolymerizing i) unsaturated carboxylic acid, unsaturated carboxylic acid anhydride, or a mixture thereof, and ii) an olefin-based unsaturated compound or a mixture thereof, a dissolution inhibitor in which a phenolic hydroxyl group is protected by an acid-degradable acetal or ketal group, a photoacid generator, and a solvent. | 11-06-2014 |