| Patent application number | Description | Published |
|---|
| 20080196927 | Working panel for multilayer printed circuit board - Disclosed is a working panel for a multilayer printed circuit board. The working panel for a multilayer printed circuit board is constructed in a manner such that first and second strips, having circuit layers and insulating layers which are layered on the upper and lower sides of a core in the opposite order with respect to each other, are appropriately disposed, by which the working panel can resist warpage due to thermal stress applied during the substrate fabrication process, thus imparting industrially useful effects that promise improvements in the standardization, productivity and yield of products. | 08-21-2008 |
| 20100096171 | Printed circuit board having round solder bump and method of manufacturing the same - Disclosed herein is a printed circuit board having round solder bumps and a method of manufacturing the same. The solder bump is configured to have a round connecting surface in contact with a pad, and thus have an increased contact area with respect to the pad, thus improving connection reliability. The solder bumps have uniform heights. | 04-22-2010 |
| 20100132982 | Package substrate including solder resist layer having pattern parts and method of fabricating the same - Disclosed is a package substrate including a solder resist layer having pattern parts and a method of fabricating the same, in which the pattern parts are formed on the solder resist layer, thus increasing heat dissipation efficiency and minimizing the warpage of the substrate. | 06-03-2010 |
| 20100139964 | Printed circuit board comprising metal bump and method of manufacturing the same - Disclosed herein is a printed circuit board, including: an upper circuit layer including connection pads made of a conductive metal and buried in an insulation layer; and metal bumps, each having a constant diameter, which are integrated with the connection pads and protrude over the insulation layer. | 06-10-2010 |
| 20110061922 | PACKAGE SUBSTRATE AND METHOD OF FABRICATING THE SAME - Disclosed is a package substrate, which includes an insulating layer including a circuit layer having a via for connecting layers and an insulating member formed in the insulating layer so as to separate the insulating layer, thus preventing the package substrate from warping and reducing land co-planarity of the substrate. A method of fabricating the package substrate is also provided, including (a) forming a first circuit layer on a carrier, (b) forming an insulating layer on the carrier having the first circuit layer, (c) forming an insulating member in the insulating layer so as to separate the insulating layer, (d) forming a second circuit layer including a via on the insulating layer and the insulating member, and (e) removing the carrier. | 03-17-2011 |
| 20110067901 | PACKAGE SUBSTRATE - Disclosed is a package substrate, in which the plating area of a first plating layer formed on a layer which is to be connected to a motherboard is larger than the plating area of a second plating layer formed on a layer which is to be connected to an electronic part, and open portions are formed on the first plating layer, thus balancing the plating areas of the plating layers formed on the layers of the package substrate, thereby minimizing warpage of the package substrate due to differing coefficients of thermal expansion. | 03-24-2011 |
| 20110076472 | Package substrate - Disclosed is a package substrate, in which the plating area of a first plating layer formed on a layer which is to be connected to a motherboard is larger than the plating area of a second plating layer formed on a layer which is to be connected to an electronic part, and the plating thickness of the second plating layer is greater than the plating thickness of the first plating layer, thus balancing the plating volumes of the plating layers formed on the layers of the package substrate, thereby minimizing warpage of the package substrate which results from the coefficients of thermal expansion being different. | 03-31-2011 |
| 20110163064 | CARRIER FOR MANUFACTURING PRINTED CIRCUIT BOARD, METHOD OF MANUFACTURING THE SAME AND METHOD OF MANUFACTURING PRINTED CIRCUIT BOARD USING THE SAME - Disclosed is a carrier for manufacturing a printed circuit board, which includes a first carrier including a first binder having a first opening and a first metal layer formed in the first opening of the first binder, and a second carrier, stacked with the first carrier and including a second binder having a second opening and a second metal layer which is formed in the second opening of the second binder and which partially overlaps with the first metal layer, so that the carrier is simply configured and the binders are formed not only on the lateral surfaces of the metal layers but also on the upper surfaces thereof, thus improving the reliability of bonding of the carrier at the periphery. A method of manufacturing the carrier and a method of manufacturing a printed circuit board using the carrier are also provided. | 07-07-2011 |
| Patent application number | Description | Published |
|---|
| 20100031775 | METHOD FOR PREPARING NICKEL NANOPARTICLES - Provided is a method for preparing nickel nanoparticles capable of easily controlling particle sizes and shapes of the nickel nanoparticles and obtaining a high yield of the nickel nanoparticles using a process that is simpler than methods used to mass-produce the nickel nanoparticles. The method for preparing nickel nanoparticles may be useful to prepare nickel nanoparticles by mixing a nickel precursor and organic amine to prepare a mixture and heating the mixture. | 02-11-2010 |
| 20100128169 | Frame rate conversion apparatus and method for ultra definition image - A frame rate conversion apparatus and method for an Ultra-High Definition (UD) image. The frame rate conversion apparatus may store a previous frame and a current frame of an edge of an input image, divided into N images, and insert an interpolation frame between the current frame and the previous frame. Also, the frame rate conversion apparatus may convert a frame rate of each of the N images. | 05-27-2010 |
| 20110149471 | MULTILAYER CERAMIC CAPACITOR AND METHOD OF FABRICATING THE SAME - There is provided a multilayer ceramic capacitor including: a capacitor main body formed by alternately stacking an internal electrode including an internal electrode-forming material and a dielectric layer; and an external electrode formed on the external surface of the capacitor to be electrically connected to the internal electrode and having an external electrode-forming material, wherein the internal electrode includes a non-diffusion layer including the external electrode-forming material of 2 vol % to 20 vol % and a diffusion layer made of the external electrode-forming material on at least one of the both ends of the non-diffusion layer. | 06-23-2011 |
| 20110154660 | CONDUCTIVE PASTE COMPOSITION FOR INNER ELECTRODES AND METHOD OF MANUFACTURING MULTILAYER CERAMIC CAPACITOR USING THE SAME - Provided are a conductive paste composition for inner electrodes and a method of manufacturing a multilayer ceramic capacitor using the same. The conductive paste composition for inner electrodes includes a metal powder having an average particle size ranging from 50 nm to 300 nm, and 4 to 10 parts by weight of a binder resin. The binder resin contains at least one resin selected from the group consisting of a high-molecular-weight polyvinylbutyral resin having a weight-average molecular weight of 250 thousands to 400 thousands, a low-molecular-weight polyvinylbutyral resin having a weight-average molecular weight of 50 thousands to 150 thousands, and a rosin ester. | 06-30-2011 |
| 20110305383 | APPARATUS AND METHOD PROCESSING THREE-DIMENSIONAL IMAGES - Provided is a 3D image processing apparatus and method. The 3D image processing apparatus may determine, with a small amount of calculation, a quantization parameter to be used for compressing a depth image, based on a quantization parameter used for compressing a color image and characteristics of the color image and the depth image. | 12-15-2011 |
| 20110317766 | APPARATUS AND METHOD OF DEPTH CODING USING PREDICTION MODE - A depth image coding method may calculate a depth offset of a depth image, may generate a prediction mode based on the depth offset, may minimize a prediction error of the depth image having a low correlation between adjacent points of view and a low temporal correlation and may enhance a compression rate. The depth offset may be calculated based on a representative value of adjacent pixels included in a template as opposed to using a depth representative value of pixels in a block and header information may not be needed to encode an offset and the offset may be generated by a depth image decoding apparatus. When a plurality of objects is included in a block, a depth offset is calculated for each of the plurality of objects and a motion vector is calculated for each of the plurality of objects and the depth image may be accurately predicted. | 12-29-2011 |
| 20120039528 | Image processing apparatus and method - Provided is an image processing apparatus. In the case of a multi-view image, the image processing apparatus may warp a color image and/or a depth image of a reference view to correspond to a target view. An occlusion region may be extracted by comparing the warped color image and/or depth image of the reference view with a color image and/or a depth image of the target view. The image processing apparatus may encode the extracted occlusion region information without loss, and decrease an amount of data in the multi-view image. | 02-16-2012 |
