Patent application number | Description | Published |
20090101984 | Semiconductor device having gate electrode including metal layer and method of manufacturing the same - A semiconductor device may include a gate dielectric film on a semiconductor substrate and/or a gate electrode. The gate electrode may include a first metal film, a first metal silicide film, and/or a conductive polysilicon film sequentially stacked on the gate dielectric film. | 04-23-2009 |
20090189229 | Semiconductor devices and methods of fabricating the same - Provided are semiconductor devices and methods of fabricating the same, and more specifically, semiconductor devices having a W—Ni alloy thin layer that has a low resistance, and methods of fabricating the same. The semiconductor devices include the W—Ni alloy thin layer. The weight of Ni in the W—Ni alloy thin layer may be in a range from approximately 0.01 to approximately 5.0 wt % of the total weight of the W—Ni alloy thin layer. | 07-30-2009 |
20100120211 | Methods of manufacturing Semiconductor Devices Including PMOS and NMOS Transistors Having Different Gate Structures - A semiconductor device may include a semiconductor substrate having first and second regions. A first gate structure on the first region of the semiconductor substrate may include a metal oxide dielectric layer on the first region of the semiconductor substrate and a first conductive layer on the metal oxide dielectric layer. First and second source/drain regions of a first conductivity type may be provided in the first region of the semiconductor substrate on opposite sides of the first gate structure. A second gate structure on the second region of the semiconductor substrate may include a silicon oxide based dielectric layer and a second conductive layer on the silicon oxide based dielectric layer. First and second source/drain regions of a second conductivity type may be provided in the second region of the semiconductor substrate on opposite sides of the second gate structure, wherein the first and second conductivity types are different. Related methods are also discussed. | 05-13-2010 |
20100210105 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE HAVING BURIED WIRING - A method of fabricating a semiconductor device can include forming a trench in a semiconductor substrate, forming a first conductive layer on a bottom surface and side surfaces of the trench, and selectively forming a second conductive layer on the first conductive layer to be buried in the trench. The second conductive layer may be formed selectively on the first conductive layer by using an electroless plating method or using a metal organic chemical vapor deposition (MOCVD) or an atomic layer deposition (ALD) method. | 08-19-2010 |
20110003455 | METHODS FOR FABRICATING IMPROVED GATE DIELECTRICS - Disclosed are a variety of methods for increasing the relative thickness in the peripheral or edge regions of gate dielectric patterns to suppress leakage through these regions. The methods provide alternatives to conventional GPDX processes and provide the improved leakage resistance without incurring the degree of increased gate electrode resistance associated with GPDX processes. Each of the methods includes forming a first opening to expose an active area region, forming an oxidation control region on the exposed portion and then forming a second opening whereby a peripheral region free of the oxidation control region is exposed for formation of a gate dielectric layer. The resulting gate dielectric layers are characterized by a thinner central region surrounded or bounded by a thicker peripheral region. | 01-06-2011 |
20110189846 | METHODS OF MANUFACTURING NON-VOLATILE MEMORY DEVICES - A method of manufacturing a non-volatile memory device including a tunnel oxide layer, a preliminary charge storing layer and a dielectric layer on a semiconductor layer is disclosed. A first polysilicon layer is formed on the dielectric layer. A barrier layer and a second polysilicon layer are formed on the first polysilicon layer. The second polysilicon layer, the barrier layer, the first polysilicon layer, the dielectric layer, the preliminary charge storing layer and the tunnel oxide layer are patterned to form a tunnel layer pattern, a charge storing layer pattern, a dielectric layer pattern, a first control gate pattern, a barrier layer pattern and a second polysilicon pattern. A nickel layer is formed on the second polysilicon layer. Heat treatment is performed with respect to the second polysilicon pattern and the nickel layer to form a second control gate pattern including NiSi on the barrier layer pattern. | 08-04-2011 |
20140070426 | INTEGRATED CIRCUIT DEVICES INCLUDING A VIA STRUCTURE AND METHODS OF FABRICATING INTEGRATED CIRCUIT DEVICES INCLUDING A VIA STRUCTURE - Integrated circuit devices are provided. The integrated circuit devices may include a via structure including a conductive plug, a conductive barrier layer spaced apart from the conductive plug, and an insulating layer between the conductive plug and conductive barrier layer. Related methods of forming integrated circuit devices are also provided. | 03-13-2014 |
20140159145 | SEMICONDUCTOR DEVICE - A semiconductor device includes a gate trench across an active region of a semiconductor substrate, a gate structure filling the gate trench, and source/drain regions formed in the active region at respective sides of the gate structure. The gate structure includes a sequentially stacked gate electrode and insulating capping pattern, and a gate dielectric layer between the gate electrode and the active region. The gate electrode is located at a lower level than an upper surface of the active region and includes a barrier conductive pattern and a gate conductive pattern. The gate conductive pattern includes a first part having a first width and a second part having a second width greater than the first width. The barrier conductive pattern is interposed between the first part of the gate conductive pattern and the gate dielectric layer. | 06-12-2014 |
20150017797 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE INCLUDING METAL-CONTAINING CONDUCTIVE LINE - A semiconductor device includes: a semiconductor substrate having a trench therein, a metal-containing barrier layer extending along an inner wall of the trench and defining a wiring space in the trench, the wiring space having a first width along a first direction, and a metal-containing conductive line on the metal-containing barrier layer in the wiring space, and including at least one metal grain having a particle diameter of about the first width along the first direction. | 01-15-2015 |
20150028450 | INTEGRATED CIRCUIT DEVICE INCLUDING THROUGH-SILICON VIA STRUCTURE AND DECOUPLING CAPACITOR AND METHOD OF MANUFACTURING THE SAME - An integrated circuit device is provided which includes a through-silicon via (TSV) structure and one or more decoupling capacitors, along with a method of manufacturing the same. The integrated circuit device may include a semiconductor structure including a semiconductor substrate, a TSV structure passing through the semiconductor substrate, and a decoupling capacitor formed in the semiconductor substrate and connected to the TSV structure. The TSV structure and the one or more decoupling capacitors may be substantially simultaneously formed. A plurality of decoupling capacitors may be disposed within a keep out zone (KOZ) of the TSV structure. The plurality of decoupling capacitors may have the same or different widths and/or depths. An isopotential conductive layer may be formed to reduce or eliminate a potential difference between different parts of the TSV structure. | 01-29-2015 |
20150028494 | INTEGRATED CIRCUIT DEVICE HAVING THROUGH-SILICON-VIA STRUCTURE AND METHOD OF MANUFACTURING THE INTEGRATED CIRCUIT DEVICE - Provided is an integrated circuit device including a through-silicon-via (TSV) structure and a method of manufacturing the integrated circuit device. The integrated circuit device includes a semiconductor structure including a substrate and an interlayer insulating film, a TSV structure passing through the substrate and the interlayer insulating film, a via insulating film substantially surrounding the TSV structure, and an insulating spacer disposed between the interlayer insulating film and the via insulating film. | 01-29-2015 |
Patent application number | Description | Published |
20090239368 | Methods of Forming an Oxide Layer and Methods of Forming a Gate Using the Same - An oxide layer is selectively formed on a layer including silicon by a plasma process using hydrogen gas and a gas including oxygen. The hydrogen gas is controlled to have a flow rate less than about 50 percent of an overall flow rate by adding helium gas to the plasma process. | 09-24-2009 |
20090256177 | Semiconductor device including an ohmic layer - In an ohmic layer and methods of forming the ohmic layer, a gate structure including the ohmic layer and a metal wiring having the ohmic layer, the ohmic layer is formed using tungsten silicide that includes tungsten and silicon with an atomic ratio within a range of about 1:5 to about 1:15. The tungsten silicide may be obtained in a chamber using a reaction gas including a tungsten source gas and a silicon source gas by a partial pressure ratio within a range of about 1.0:25.0 to about 1.0:160.0. The reaction gas may have a partial pressure within a range of about 2.05 percent to about 30.0 percent of a total internal pressure of the chamber. When the ohmic layer is employed for a conductive structure, such as a gate structure or a metal wiring, the conductive structure may have a reduced resistance. | 10-15-2009 |
20090315091 | GATE STRUCTURE, AND SEMICONDUCTOR DEVICE HAVING A GATE STRUCTURE - A gate structure can include a polysilicon layer, a metal layer on the polysilicon layer, a metal silicide nitride layer on the metal layer and a silicon nitride mask on the metal silicide nitride layer | 12-24-2009 |
20100029073 | Methods of Forming Integrated Circuit Devices Having Anisotropically-Oxidized Nitride Layers - Methods of forming integrated circuit devices include forming a gate electrode on a substrate and forming a nitride layer on a sidewall and upper surface of the gate electrode. The nitride layer is then anisotropically oxidized under conditions that cause a first portion of the nitride layer extending on the upper surface of the gate electrode to be more heavily oxidized relative to a second portion of the nitride layer extending on the sidewall of the gate electrode. A ratio of a thickness of an oxidized first portion of the nitride layer relative to a thickness of an oxidized second portion of the nitride layer may be in a range from about 3:1 to about 7:1. | 02-04-2010 |
20120100708 | Methods of Forming Integrated Circuit Devices Having Anisotropically-Oxidized Nitride Layers - Methods of forming integrated circuit devices include forming a gate electrode on a substrate and forming a nitride layer on a sidewall and upper surface of the gate electrode. The nitride layer is then anisotropically oxidized under conditions that cause a first portion of the nitride layer extending on the upper surface of the gate electrode to be more heavily oxidized relative to a second portion of the nitride layer extending on the sidewall of the gate electrode. A ratio of a thickness of an oxidized first portion of the nitride layer relative to a thickness of an oxidized second portion of the nitride layer may be in a range from about 3:1 to about 7:1. | 04-26-2012 |
20130075909 | SEMICONDUCTOR DEVICE INCLUDING METAL-CONTAINING CONDUCTIVE LINE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device includes: a semiconductor substrate having a trench therein, a metal-containing barrier layer extending along an inner wall of the trench and defining a wiring space in the trench, the wiring space having a first width along a first direction, and a metal-containing conductive line on the metal-containing barrier layer in the wiring space, and including at least one metal grain having a particle diameter of about the first width along the first direction. | 03-28-2013 |
Patent application number | Description | Published |
20110255045 | DISPLAY SUBSTRATE, LIQUID CRYSTAL DISPLAY INCLUDING THE DISPLAY SUBSTRATE, AND METHOD OF MANUFACTURING THE DISPLAY SUBSTRATE - Provided are a display substrate, a liquid crystal display (LCD) including the display substrate, and a method of manufacturing the display substrate. The display substrate includes: an insulating substrate; a gate wiring formed on the insulating substrate and extending generally in a first direction; a data wiring which is insulated from the gate wiring, intersects the gate wiring, and which extends generally in a second direction; a pixel electrode formed in a pixel region defined by the gate wiring and the data wiring; and a storage wiring which is formed on the same layer as the gate wiring, is overlapped by the data wiring to be insulated from the data wiring, and which extends generally in the second direction, wherein each of the gate wiring and the storage wiring has a tapered surface oriented generally at an inclination angle of approximately 30 degrees or less with respect to the insulating substrate. | 10-20-2011 |
20120112199 | THIN FILM TRANSISTOR ARRAY PANEL - A thin film transistor array panel according to an exemplary embodiment of the present invention floats all data lines during a manufacturing process by forming the data lines DL separate from each other and separate from the data pad connecting lines DLL, and only connecting the lines DL to the corresponding lines DLL after the data lines DL are etched. This reduces etching speed differences between data wires, thereby reducing the problem of differing thicknesses for different data lines DL. Therefore, it is possible to prevent performance deterioration or display quality deterioration of the transistor due to a thickness difference of data wires. | 05-10-2012 |
20120211751 | Display Apparatus and Method of Manufacturing the Same - A display apparatus includes a substrate and a plurality of pixels disposed on the substrate. Each pixel includes a gate electrode disposed on the substrate, a gate dielectric layer disposed on the substrate and the gate electrode, an oxide semiconductor pattern disposed on the gate dielectric layer, a first insulating pattern disposed on the oxide semiconductor pattern that overlaps the gate electrode, a second insulating pattern disposed on the oxide semiconductor pattern and spaced apart from the first insulating pattern, source and drain electrodes spaced apart from each other on the oxide semiconductor pattern, a pixel electrode pattern disposed on the second insulating pattern to make contact with the source electrode, and a channel area defined where the oxide semiconductor pattern overlaps the gate electrode. A high carrier mobility channel is formed in the channel area when a turn-on voltage is applied to the gate electrode. | 08-23-2012 |
20120326950 | DISPLAY PANELS - A display panel includes: a first base substrate on which a plurality of pixel areas are defined; a color filter layer including a plurality of color filters respectively in the plurality of pixel areas of the first base substrate, where four color filters having different colors are respectively in four pixel areas adjacent to each other; a plurality of pixel electrodes on the color filter layer, respectively in the plurality of pixel areas and electrically insulated from each other; a first area including a contact point at which the four adjacent pixel areas meet; a second base substrate which is combined with the first base substrate and faces the second base substrate; and a reference electrode on one of the first and second base substrates. At least one color filter among the four adjacent color filters includes a protruding part which overlaps the first area. | 12-27-2012 |
20130038806 | THIN-FILM TRANSISTOR SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME - A thin-film transistor (TFT) substrate includes a base substrate, a test pad and a test pad line. The base substrate includes a display area including a data line and a TFT, a peripheral area including a common voltage line, and a test area disposed outside of the peripheral area. The test pad is disposed in the test area and electrically connected to the data line. The test pad line connects the data line with the test pad and crosses the common voltage line. | 02-14-2013 |
20130093658 | DISPLAY DEVICE - A display device includes gate lines, data lines, first wires and second wires extending in the directions of the gate lines and data lines, and pixels having a first subpixel and a second subpixel each. The first subpixel has a first subpixel electrode and a first switching element, and the second subpixel has a second subpixel electrode and second and third switching elements. The control terminals of the three switching elements are connected to the same gate line, and the input terminals of the first and second switching elements are connected to the same data line. The first and second switching elements have output terminals connected to the first and second subpixel electrodes, respectively. The second switching element's output terminal connects to the third switching element, which has an output terminal connected to a second wire. The first wires and the second wires are connected in a pixel. | 04-18-2013 |
20130162616 | TRANSPARENT DISPLAY APPARATUS - A transparent display apparatus includes a display panel including a plurality of pixels arranged in rows and columns, a plurality of gate lines, a plurality of data lines including first and second data lines, a gate driver, and a data driver. Each of the pixels comprises sub-pixels arranged in a row direction, each gate line is operatively coupled to sub-pixels arranged in a corresponding row, and each first and second data line is operatively coupled to sub-pixels arranged in a corresponding column. The gate driver sequentially applies a gate signal to the pixels through the gate lines. The data driver applies sub-data signals to the sub-pixels through the first data lines, and applies down data signals to the sub-pixels through the second data lines. Each of the down data signals has a voltage level lower than a voltage level of a corresponding sub-data signal. | 06-27-2013 |
20130169901 | DISPLAY SUBSTRATE, METHOD OF MANUFACTURING THE SAME AND DISPLAY APPARATUS HAVING THE SAME - A display substrate includes a base substrate, a thin-film transistor (TFT), a color filter and a pixel electrode. The TFT is on the base substrate. The color filter is on the base substrate including the TFT and in contact with the base substrate. The pixel electrode is on the color filter and in electrical connection to a drain electrode of the TFT. | 07-04-2013 |
20140098315 | LIQUID CRYSTAL DISPLAY - A liquid crystal display includes: a first insulation substrate; a gate line disposed on the first insulation substrate; a first data line and a second data line disposed on the first insulation substrate; a color filter disposed on the first insulation substrate and disposed between the first data line and the second data line; a first light blocking member disposed on the first data line and the second data line; and a second light blocking member disposed on the color filter and the first light blocking member, extending in the same direction as the gate line, and overlapping the first light blocking member on the first data line and the second data line. | 04-10-2014 |
20140117385 | DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME - A display device including a base substrate, a pixel disposed on the base substrate, and a color filter part disposed between the base substrate and the pixel. The color filter part includes a color filter corresponding to the pixel and a black matrix disposed at at least a side of the color filter. The pixel includes a cover layer defining a tunnel-shaped cavity on the base substrate, an image display part disposed in the tunnel-shaped cavity, and first and second pixel electrodes and a common electrode applying an electric field to the image display part. The tunnel-shaped cavity is formed by forming a sacrificial layer and wet-etching the sacrificial layer. | 05-01-2014 |
20140125908 | LIQUID CRYSTAL DISPLAY AND MANUFACTURING METHOD THEREOF - A liquid crystal display device may include a substrate. The liquid crystal display device may further include a pixel electrode disposed on the substrate. The liquid crystal display device may further include a common electrode overlapping the pixel electrode, wherein a liquid crystal injection hole is formed through at least the common electrode. The liquid crystal display device may further include a liquid crystal layer disposed between the pixel electrode and the common electrode. The liquid crystal display device may further include a light-blocking element disposed inside the liquid crystal injection hole. | 05-08-2014 |
20140160395 | LIQUID CRYSTAL DISPLAY - A liquid crystal display includes an insulation substrate, a pixel electrode, a microcavity layer, a common electrode, and a layer. The pixel electrode is disposed on the substrate. The microcavity layer is disposed on the pixel electrode and includes a plurality of microcavities including liquid crystal molecules disposed therein. The common electrode is disposed on the microcavity layer. The layer is disposed on the common electrode and includes an organic material. The layer comprises a refractive index of more than 1.6 and less than 2.0. | 06-12-2014 |
20140285754 | DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME - A display device includes a display area and a non-display area, a first alignment layer disposed on a first substrate, a second alignment layer disposed on a second substrate, a liquid crystal layer disposed between the first alignment layer and the second alignment layer; and a groove disposed in the non-display area of the second substrate to correspond to at least a portion of an end portion of the second alignment layer. The groove is provided along at least one side of the display area and is configured to be filled by an alignment solution used to from the second alignment layer and prevent the alignment solution from dispersing to other areas of the second substrate. | 09-25-2014 |
20150035741 | DISPLAY APPARATUS - A display apparatus includes a base substrate, an array of pixel electrodes formed over the base substrate, an array of active cavities disposed over the array of pixel electrodes, at least one common electrode opposing the array of pixel electrodes such that the array of active cavities are disposed between the at least one common electrode and the array of pixel electrodes. The apparatus further includes a metal line electrically connected with the at least one common electrode in the display area. | 02-05-2015 |
20150049273 | DISPLAY PANEL HAVING FEWER DEFECTS AND METHOD OF MANUFACTURING THE SAME - A display panel includes a base substrate, a driving circuit, and a roof layer defining a cavity. A color filter is disposed on the base substrate to at least partially cover the driving circuit. The color filter is disposed at least on a pixel area and includes a depression positioned at least partially within a circuit area. A black matrix is disposed upon the depression of the color filter. The black matrix being upon the depression allows an inlet portion of the cavity to remain greater than a certain cross-sectional area. | 02-19-2015 |
20150077678 | LIQUID CRYSTAL DISPLAY - Disclosed is a liquid crystal display including: a first substrate; a gate line disposed on the first substrate; a data line disposed on the gate line; and a thin film transistor connected to the gate line and the data line. A plurality of color filters is disposed on the thin film transistor and the data line. A capping layer is disposed on the plurality of color filters. A shielding electrode is disposed on the capping layer. An insulating layer is disposed on the capping layer and includes a first opening extending to a part of the shielding electrode. A light blocking member is disposed on the insulating layer and the shielding electrode. The shielding electrode is disposed in a part corresponding to the data line. Adjacent color filters among the plurality of color filters overlap with each other in the part corresponding to the data line. The first opening is disposed in a part corresponding to the region where the adjacent color filters overlap with each other. | 03-19-2015 |