Patent application number | Description | Published |
20130161688 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - There are provided a semiconductor device and a method of manufacturing the same. The semiconductor device includes a semiconductor substrate having a front surface and a back surface and having a p-type impurity layer, a low-concentration n-type impurity layer, and an n-type impurity layer disposed in a backward direction from the front surface thereof, the n-type impurity layer having a high-concentration p-type impurity region therein and the n-type impurity layer and the high-concentration p-type impurity region being exposed to the back surface; and a deep trench formed vertically in the semiconductor substrate to be open to the front surface of the semiconductor substrate and having a bottom surface connected to the high-concentration p-type impurity region. Here, an activation ratio of impurities may be increased and damages to a wafer may be prevented during a thin film process. | 06-27-2013 |
20140015003 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - Disclosed herein are a semiconductor device, and a method for manufacturing the semiconductor device. The semiconductor device includes a semiconductor substrate, a base region formed on an upper region of an inside of the semiconductor substrate, at least one gate electrode that penetrates through the base region and has an inverted triangular shape, a gate insulating film formed to enclose an upper portion of the semiconductor substrate and the gate electrode, an inter-layer insulating film formed on an upper portion of the gate electrode and the gate insulating film, an emitter region formed inside the base region and on both sides of the gate electrode, an emitter metal layer formed on an upper portion of the base region and inter-layer insulating film, and a buffer region formed to enclose a lower portion of the gate electrode and to be spaced apart from the base region. | 01-16-2014 |
20140061718 | INSULATED GATE BIPOLAR TRANSISTOR - There is provided an insulated gate bipolar transistor, including: an active region including a gate electrode, a first emitter metal layer, a first well region, and one portion of a third well region; a termination region including a second well region supporting diffusion of a depletion layer; and a connection region located between the active region and the termination region and including a second emitter metal layer, a gate metal layer, and the other portion of the third well region, wherein the third well region is formed over the active region and the connection region, and the first emitter metal layer and the second emitter metal layer are formed on the third well region. | 03-06-2014 |
20140117373 | SEMICONDUCTOR DEVICE - Disclosed herein is a semiconductor device including: a source electrode formed on one side of an N-type AlGaN layer; N-type and P-type AlGaN layers formed on the other side of the P-type AlGaN layer and formed in a direction perpendicular to the source electrode; a gate electrode formed on one side of the N-type and P-type AlGaN layers; and a drain electrode formed on the other side of the N-type and P-type AlGaN layers. | 05-01-2014 |
20140117374 | SEMICONDUCTOR DEVICE - Disclosed herein is a semiconductor device including: a base substrate; a first nitride semiconductor layer formed on the base substrate; a second nitride semiconductor layer formed on the first nitride semiconductor layer; a cathode electrode formed on one side of the second nitride semiconductor layer; an anode electrode having one end and the other end, one end being recessed at the other side of the second nitride semiconductor layer up to a predetermined depth, and the other end being spaced apart from the cathode electrode and formed to be extended up to an upper portion of the cathode electrode; and an insulating film formed on the second nitride semiconductor layer between the anode electrode and the cathode electrode so as to cover the cathode electrode. | 05-01-2014 |
20140145291 | POWER SEMICONDUCTOR DEVICE - Disclosed herein is a power semiconductor device. The power semiconductor device includes a second conductive type first junction termination extension (JTE) layer that is formed so as to be in contact with one side of the second conductive type well layer, a second conductive type second JTE layer that is formed on the same line as the second conductive type first JTE layer, and is formed so as to be spaced apart from the second conductive type first JTE layer in a length direction of the substrate, and a poly silicon layer that is formed so as to be in contact with the second conductive type well layer and an upper portion of the second conductive type first JTE layer. | 05-29-2014 |
20140159105 | POWER SEMICONDUCTOR DEVICE - Disclosed herein is a power semiconductor device, including: a drift layer formed on the first surface of the semiconductor substrate, a well layer of a first conductive type, formed on the drift layer, a trench formed to reach the drift layer through the well layer, a first electrode formed in the trench, a second conductive type of second electrode region formed on the well layer, including a first region contacting the trench in a perpendicular direction and a second region spaced apart from the trench in a parallel direction and being perpendicular to the first region, a first conductive type of second electrode region formed to contact a side surface of the second conductive type of second electrode region, and a second electrode formed on the well layer and electrically connected to the second conductive type of second electrode region and the first conductive type of second electrode region. | 06-12-2014 |
20150060999 | POWER SEMICONDUCTOR DEVICE - A power semiconductor device may include: a drift layer having a first conductivity; a hole accumulating layer formed on the drift layer and having the first conductivity; a well layer formed on the hole accumulating layer and having a second conductivity; an emitter region formed in an internal portion of an upper portion of the well layer and having the first conductivity; and trench gates penetrating through the emitter region, the well layer, and the hole accumulating layer, and having a gate insulating layer formed on a surface thereof. The trench gate may be sequentially divided into a first gate part, a second gate part, and a third gate part from an upper portion thereof depending on a height of a material filled in the trench gate, the first to third gate parts having different resistances from each other. | 03-05-2015 |
20150076595 | POWER SEMICONDUCTOR DEVICE - A power semiconductor device may include: a first conductive type drift layer in which trench gates are formed; a second conductive type well region formed on the drift layer so as to contact the trench gate; a first conductive type source region formed on the well region so as to contact the trench gate; and a device protection region formed below a height of a lowermost portion of the source region in a height direction. | 03-19-2015 |
Patent application number | Description | Published |
20140117407 | POWER SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - Disclosed herein is a power semiconductor device including: a base substrate having one surface and the other surface and formed of a first conductive type drift layer; a first conductive type diffusion layer formed on one surface of the base substrate and having a concentration higher than that of the first conductive type drift layer; and a trench formed so as to penetrate through the second conductive type well layer and the first conductive type diffusion layer from one surface of the base substrate including the second conductive type well layer in a thickness direction. | 05-01-2014 |
20140312383 | POWER SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A power semiconductor device may include: abase substrate including a first conductive type drift layer; a second conductive type semiconductor substrate disposed on the other surface of the base substrate; a first conductive type diffusion layer disposed in the base substrate and having an impurity concentration higher than that of the drift layer; a second conductive type well layer disposed inside of one surface of the base substrate; a trench formed from one surface of the base substrate including the well layer so as to penetrate through the diffusion layer in a depth direction; a first insulation film disposed on a surface of the base substrate; and a first electrode disposed in the trench. A peak point of an impurity doping concentration of the diffusion layer in a transverse direction may be positioned in a region contacting a side surface of the trench. | 10-23-2014 |
20150041884 | POWER SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - There is provided a power semiconductor device including: a first semiconductor region of a first conductivity type; second semiconductor regions formed in the first semiconductor region and being of a second conductivity type; a well region formed above the second semiconductor regions and being of the second conductivity type; and a source region formed in the well region and being of the first conductivity type, wherein the second semiconductor regions include 1 to n layers formed from a lower portion of the device extending a in a direction of height of the device, and in the case that the widest width of the of the second semiconductor region of the n | 02-12-2015 |
20150087117 | POWER SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - Disclosed herein is a power semiconductor device including: a base substrate having one surface and the other surface and formed of a first conductive type drift layer; a first conductive type diffusion layer formed on one surface of the base substrate and having a concentration higher than that of the first conductive type drift layer; and a trench formed so as to penetrate through the second conductive type well layer and the first conductive type diffusion layer from one surface of the base substrate including the second conductive type well layer in a thickness direction. | 03-26-2015 |