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Iwamatsu, JP

Akihiro Iwamatsu, Iwate JP

Patent application numberDescriptionPublished
20110286067OPTICAL SCANNING DEVICE AND IMAGE FORMING APPARATUS - An optical scanning device includes a light source; a scanning unit to deflect/scan a laser beam from the light source; an imaging optical system to focus the deflected and scanned laser beam to a scan-target surface; an electro-optic element to electrically change a refractive index thereof; a controller to control the refractive index of the electro-optic element to adjust deflection amount of the laser beam; and a positional shift detecting unit, disposed away from the light path, to detect a positional shift of the incident laser beam from an ideal position in a sub-scanning direction. The device further includes a beam splitting element, and the controller adjusts a deflection amount of the laser beam from the electro-optic element based on a detection result by the positional shift detecting unit and corrects a positional shift in the sub-scanning direction of the laser beam on the scan-target surface.11-24-2011

Akihiro Iwamatsu, Yokohama JP

Patent application numberDescriptionPublished
20090305242SKIN AGING MARKER AND TECHNIQUE FOR USE THEREOF - It is an object of the present invention to find substances that can be used as skin aging markers, and the present invention provides a method for determining the degree of skin aging, including measurement of expression of secretory proteins and/or intracellular proteins and/or their genes in skin cells and/or skin tissues, wherein the secretory proteins and/or intracellular proteins change their expression with aging of skin. The present invention also provides a kit for determining the degree of skin aging and a method for identifying substances effective in the prevention of skin aging.12-10-2009

Akihiro Iwamatsu, Kanagawa JP

Patent application numberDescriptionPublished
20090263792ATOPIC DERMATITIS MARKER AND TECHNIQUE OF USING THE SAME - It is an object of the present invention to find substances that can be used as disease markers for atopic dermatitis and the present invention provides a method for determining atopic dermatitis, including measurement of the expression of specific proteins and/or their genes in skin cells and/or skin tissues, wherein the specific proteins change their expression with inflammation caused by atopic dermatitis or change their expression according to the degree of predisposition to atopic dermatitis. The present invention also provides a kit for determining the degree of inflammation of atopic dermatitis or risk of developing atopic dermatitis, as well as a method for determining substances effective in the treatment and/or prevention of atopic dermatitis.10-22-2009

Akihiro Iwamatsu, Ebina-Shi JP

Patent application numberDescriptionPublished
20090073580PLASTIC OPTICAL ELEMENT, NEST STRUCTURE, DIE, OPTICAL SCAN APPARATUS AND IMAGE FORMATION APPARATUS - A plastic optical element is provided, which includes an optical element body having a transfer surface which includes at least one laser beam incident portion of a concave shape, and a support portion connected with the optical element body, in which the support portion is disposed in a direction of a tangent line at an end of the transfer surface, and the optical element body and a part of the support portion are molded in the same nest structure.03-19-2009
20090168188IMAGE FORMING APPARATUS, OPTICAL SCANNING DEVICE, AND PLASTIC LENS - A plastic lens molded in a mold having two first molding blocks and two second molding blocks. The first molding blocks transfer light incidence and emission surfaces. The second molding blocks are provided to both ends of the first molding blocks, disposed parallel to an optical axis and facing each other, and transfer non-light-passing surfaces. At least one of the second molding blocks includes an elongated slit-like ventilation hole having a length of a light effective range or longer and extending in a main scanning direction of the light incidence and emission surfaces along positions equidistant from the light incidence and emission surfaces. Through the ventilation hole, air is sprayed onto molten resin in a process of resin cooling and solidification to facilitate cooling of the resin.07-02-2009

Fuminori Iwamatsu, Hitachi JP

Patent application numberDescriptionPublished
20090056839Method for Improving Residual Stress of Structure Member - A method for improving residual stress of a structure member, comprising steps of:03-05-2009
20110155289RESIDUAL STRESS IMPROVING METHOD FOR PIPE - It is an object to provide a residual stress improving method for a pipe by imparting larger compressive residual stress on the pipe to sufficiently reduce tensile residual stress in order to prevent the stress corrosion cracking. With respect to a stress improving region where the residual stress of a pipe is to be improved, a load in the axial direction of the pipe is made such stress making axial strain of the outer surface of the pipe 0% or above and being yield stress of the pipe or below, and internal pressure of the pipe is raised. The pipe is plastically deformed and is expanded in the radial direction by the internal pressure. After the internal pressure is raised to the degree the pipe is plastically deformed, the internal pressure and the axial load are removed, and thereby compressive residual stress is imparted to a welding section and a heat affected zone which are the stress improving region of the inner surface of the pipe.06-30-2011

Hirokazu Iwamatsu, Hitachinaka JP

Patent application numberDescriptionPublished
20080240989AUTOMATIC ANALYZER - An automatic analyzer of the present invention includes a status table storing the status of each analysis module and reagent information identifying each reagent, the supply of which is exhausted, and allowing tracking of the status of each analysis module, etc. The automatic analyzer determines, based on the status table, whether and how it can continue current analysis, and stores the determination results in its instruction information table. The instruction information table stores analysis-unit or -module operating information and information to be supplied to the user or operator. The analysis-unit operating information includes instructions for the analysis modules to initiate an analysis in a normal manner, finish an analysis in a normal manner, omit a pre-analysis operation, omit a post-analysis operation, or stop sampling, etc. Further, the reagent information and the analysis module status are updated each time a reagent container is replaced by the operator.10-02-2008
20120036944AUTOMATIC ANALYZER - The present invention provides an automatic analyzer, in which when a specimen that cannot be analyzed due to an abnormality or needs to be remeasured exists, the automatic analyzer can swiftly reload the specimen that cannot be analyzed due to the abnormality or needs to be remeasured without waiting for completion of a measurement of another specimen held by a rack holding the specimen that cannot be analyzed or needs to be remeasured. The automatic analyzer has means for storing information of a rack loaded in the analyzer and specimen information, displaying identification information of the rack loaded in the analyzer to a user, specifying a specimen that needs to be reanalyzed due to an abnormality or needs to be collected for a remeasurement, interrupting analysis of a specimen rack holding the specimen, and collecting the specimen rack. The automatic analyzer can collect and reload the specified specimen.02-16-2012

Hiroki Iwamatsu, Hyogo JP

Patent application numberDescriptionPublished
20080305973Lithium Grease Composition Sealed in a Small Motor Bearing to Reduce Noise - A lithium grease composition which can be sealed in a small motor bearing to reduce noise, composed of 5-20% by weight of a thickener and 95-80% by weight of a base oil, wherein said grease composition adopts lithium soap as the thickener, which is synthesized from lithium hydroxide and a higher fatty acid with 10 to 20 carbon atoms and/or a higher hydroxyfatty acid with one or more hydroxyl groups and 10 or more carbon atoms, and the base oil includes, as a main component, a polymer ester oil (A) in which 8 or more ester groups are arranged in a comb tooth form on one side of chain molecules constituted by eight or more carbon atoms which is expressed by general formula 1: (In the formula, each of R12-11-2008
20090029881Heat resistant lithium grease composition and a small motor reduced noise bearing - A heat-resistant noise-reduction grease and a bearing containing the grease for a small motor such as a motor for imaging equipment such as a blower fan and motor bearing for a household electrical appliance such as an air conditioner, which is eco-friendly and excellent in noise-reduction properties is provided.01-29-2009

Patent applications by Hiroki Iwamatsu, Hyogo JP

Masayuki Iwamatsu, Shizuoka-Ken JP

Patent application numberDescriptionPublished
20090115514Class D amplifier - A class D amplifier includes: an amplifier that generates a digital signal for driving a load based on an input signal; an attenuator that attenuates the input signal according to an attenuation command signal; and a clip prevention controller that outputs the attenuation command signal to intermittently attenuate the input signal when the digital signal is brought into a clip state or a near-clip state.05-07-2009

Sachiko Iwamatsu, Shizuoka-Ken JP

Patent application numberDescriptionPublished
20120024598Cable Routing Structure for Vehicle - A cable routing structure for vehicle can reliably prevent a cable from being broken or damaged, and can reduce manufacturing cost. A cable is routed along a lower surface of a floor panel and connects a power generating motor installed in a vehicle front portion and a battery installed in a vehicle rear portion. A rigid tubular member having rigidity, is disposed along a vehicle front and rear direction in a floor tunnel. A flexible tubular member having flexibility is interposed between the rigid tubular member and the power generating motor. The cable is inserted through the rigid tubular member and the flexible tubular member. A front end portion of the rigid tubular member is disposed in the floor tunnel at a portion on a vehicle rear side relative to a front edge of the floor tunnel. When receiving pressure from a vehicle front side, the flexible tubular member is forcibly bent so as to be entered into in the floor tunnel.02-02-2012

Tadashi Iwamatsu, Nara-Shi JP

Patent application numberDescriptionPublished
20080299471CARRIER, DEVELOPER, DEVELOPMENT DEVICE, IMAGE FORMING APPARATUS AND IMAGE FORMING METHOD - A carrier of the present invention is used in a developer including a toner which includes at least a binder resin and an organic colorant, and the carrier has a core and a coating formed on the surface of the core, the coating including (i) a charge control agent for controlling a charge whose polarity is the same as a polarity of a charge controlled by a charge control agent included in the toner, and (ii) a conductive particles. The use of the carrier of the present invention enables: prevention of decrease in the charging amount of the toner which includes at least a binder resin and an organic colorant; and formation of a stable, high-resolution, high-quality image which has very few image defects such as a photographic fog.12-04-2008
20080311503Toner, method of manufacturing the same, two-component developer, developing device, and image forming apparatus - A toner composed of small particles excellent in a cleaning property, a transferring property, and charge uniformity is provided as well as a method of manufacturing the toner, and two-component developer, developing device, and image forming apparatus using the toner. The toner contains binder resin and colorant, and includes a particle which has an outline having one or more and three or less bending points in its projection image on a plane. The toner thus contains a non-spherical particle and therefore is caught easily by a cleaning blade as well as coming into point-contact with a to-be-transferred member, therefore being capable of having both of cleaning property and transferring property.12-18-2008
20090074463CORONA DISCHARGE DEVICE, PHOTORECEPTOR CHARGER, AND METHOD FOR MAKING DISCHARGE PRODUCT REMOVING MEMBER - A corona discharge device (03-19-2009

Patent applications by Tadashi Iwamatsu, Nara-Shi JP

Tadashi Iwamatsu, Nara JP

Patent application numberDescriptionPublished
20090041501Charging Device and Image Forming Device Using Same - A charging device (02-12-2009

Takanori Iwamatsu, Kanagawa JP

Patent application numberDescriptionPublished
20120133433APPARATUS FOR AND METHOD OF CONTROLLING A PREDISTORTER, AND METHOD OF DETECTING POWER CONTROL STATE - This invention relates to an apparatus for and a method of controlling a predistorter, and a method of detecting power control state. The method of controlling a predistorter, which is for predistorting a signal input into a power amplifier, comprises storing predistortion coefficients used by the predistorter; acquiring indices each indicative of an output power of the power amplifier; detecting, based on the indices acquired in the acquiring, whether the power amplifier is in a state of undergoing power control; and supplying the stored predistortion coefficients to the predistorter when it is detected that the power amplifier is in the state of undergoing power control, or supplying, when it is detected that the power amplifier is not in the state of undergoing power control, to the predistorter predistortion coefficients calculated by a unit that performs predistortion coefficient adaptive updating operation.05-31-2012

Toshiaki Iwamatsu, Toyonaka JP

Patent application numberDescriptionPublished
20090096036SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - There is provided an SOI-MISFET including: an SOI layer; a gate electrode provided on the SOI layer interposing a gate insulator; and a first elevated layer provided higher in height from the SOI layer than the gate electrode at both sidewall sides of the gate electrode on the SOI layer so as to constitute a source and drain. Further, there is also provided a bulk-MISFET including: a gate electrode provided on a silicon substrate interposing a gate insulator thicker than the gate insulator of the SOI MISFET; and a second elevated layer configuring a source and drain provided on a semiconductor substrate at both sidewalls of the gate electrode. A the first elevated layer is thicker than the elevated layer, and the whole of the gate electrodes, part of the source and drain of the SOI-MISFET, and part of the source and drain of the bulk-MISFET are silicided.04-16-2009
20110195566METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE - There is provided an SOI-MISFET including: an SOI layer; a gate electrode provided on the SOI layer interposing a gate insulator; and a first elevated layer provided higher in height from the SOI layer than the gate electrode at both sidewall sides of the gate electrode on the SOI layer so as to constitute a source and drain. Further, there is also provided a bulk-MISFET including: a gate electrode provided on a silicon substrate interposing a gate insulator thicker than the gate insulator of the SOI MISFET; and a second elevated layer configuring a source and drain provided on a semiconductor substrate at both sidewalls of the gate electrode. A the first elevated layer is thicker than the elevated layer, and the whole of the gate electrodes, part of the source and drain of the SOI-MISFET, and part of the source and drain of the bulk-MISFET are silicided.08-11-2011

Toshiaki Iwamatsu, Kanagawa JP

Patent application numberDescriptionPublished
20110031552SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - To provide, in FINFET whose threshold voltage is determined essentially by the work function of a gate electrode, a technology capable of adjusting the threshold voltage of FINFET without changing the material of the gate electrode. FINFET is formed over an SOI substrate comprised of a substrate layer, a buried insulating layer formed over the substrate layer, and a silicon layer formed over the buried insulating layer. The substrate layer has therein a first semiconductor region contiguous to the buried insulating layer. The silicon layer of the SOI substrate is processed into a fin. A ratio of the height of the fin to the width of the fin is adjusted to fall within a range of from 1 or greater but not greater than 2. In addition, a voltage can be applied to the first semiconductor region.02-10-2011
20110049629SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - To provide a technique capable of achieving improvement of the parasitic resistance in FINFETs. In the FINFET in the present invention, a sidewall is formed of a laminated film. Specifically, the sidewall is composed of a first silicon oxide film, a silicon nitride film formed over the first silicon oxide film, and a second silicon oxide film formed over the silicon nitride film. The sidewall is not formed on the side wall of a fin. Thus, in the present invention, the sidewall is formed on the side wall of a gate electrode and the sidewall is not formed on the side wall of the fin.03-03-2011
20110186936SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME - a method for producing a semiconductor device provided in such a manner that a first layer and a second layer are laminated to ensure that their TSVs are arranged in almost a straight line, including: first layer production steps including steps of preparing a substrate, forming a transistor of an input/output circuit on an upper surface of the substrate, forming an insulation layer so as to cover the transistor, and forming a TSV in the insulation layer; second layer production steps including steps of preparing a substrate, forming a transistor of a logic circuit on an upper surface of the substrate, forming an insulation layer so as to cover the transistor, and forming a TSV in the insulation layer; a connection step of connecting surfaces of the first layer and the second layer on a side opposite to substrates of the first layer and the second layer to ensure that the TSV of the first layer and the TSV of the second layer are arranged in almost a straight line; and a step of removing the substrate of the first layer.08-04-2011
20110215423SEMICONDUCTOR DEVICE AND A MANUFACTURING METHOD THEREOF - There are provided a semiconductor device which can be miniaturized without being deteriorated in characteristics, and a manufacturing method thereof. The semiconductor device includes a semiconductor substrate having a main surface, a source region and a drain region formed apart from each other in the main surface, a gate electrode layer formed over the main surface sandwiched between the source region and the drain region, a first conductive layer formed so as to be in contact with the surface of the source region, and a second conductive layer formed so as to be in contact with the surface of the drain region. A recess is formed in the main surface so as to extend from the contact region between the first conductive layer and the source region through a part underlying the gate electrode layer to the contact region between the second conductive layer and the drain region.09-08-2011
20120007151SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A high breakdown voltage circuit containing a high breakdown voltage MOSFET in LSI, unlike a quintessential internal circuit, has an operating voltage fixed in a high state due to the relation with the outside and, therefore, miniaturization by the voltage lowering can not be applied, differing from ordinary cases. Consequently, the voltage lowering of an internal circuit part results in a furthermore enlargement of occupying area in the chip. The present inventors evaluated various measures for the problem, and made it clear that such problems as compatibility with the CMOSFET circuit configuration and device configuration, etc. constitute obstacles.01-12-2012
20120061761SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MANUFACTURING METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT DEVICES - Logic transistors (MOSFETs, MISFETs) in core portions of integrated circuits can be microminiaturized by scaling operating voltage as their generation advances. However, since transistors (MOSFETs, MISFETs) in high-breakdown voltage portions operate on relatively high power supply voltage, it is difficult to reduce their size. Similarly, electrostatic discharge (ESD) protection circuits in power supply cells protect the elements in a semiconductor integrated circuit against static electricity (foreign surge); therefore, they are indispensably required to be high in breakdown voltage and call for a large area for dissipating electric charges. To microminiaturize integrated circuits, therefore, a transistor structure that enables microminiaturization is indispensable. To solve the above problem, a semiconductor integrated circuit device having in its ESD protection circuit portion a CMIS inverter made up of a pair of MISFETs having a source/drain asymmetric structure and including a halo region only on the source side is provided.03-15-2012

Yosuke Iwamatsu, Tokyo JP

Patent application numberDescriptionPublished
20090217014PROCESSOR, MEMORY DEVICE, PROCESSING DEVICE, AND METHOD FOR PROCESSING INSTRUCTION - A processor includes a VM trap logic and a buffering logic. The VM trap logic determines whether or not an instruction acquired from a VM (Virtual Machine) satisfies a predetermined VM trap condition. The buffering logic determines whether or not the instruction acquired from the VM satisfies a predetermined buffering condition.08-27-2009