| Patent application number | Description | Published |
|---|
| 20080199004 | Cipher System - A system including a pseudo-random number generator having a register to store an extended state having a reduced state and a dynamic constant, an initialization module to initialize a part of the extended state based on a Key and/or an Initial Value, a state update module to update the reduced state, an output word module to generate output words, the state update module and the output word module being adapted to operate through cyclical rounds, each round including updating the reduced state and then generating one of the output words, and an update dynamic constant module to update the dynamic constant, wherein in a majority of the rounds, updating of the reduced state and/or generation of the output word is based on the dynamic constant, and the dynamic constant is only updated in a minority of the rounds. Related apparatus and method are also described. | 08-21-2008 |
| 20090001821 | Chip Attack Protection - A system for protecting a chip with an integrated circuit disposed on a first surface, the system including, disposed on the first surface, a first antenna, signal analyzer, chip controller and a signal generator which is operative to supply an outbound signal for transmission by the first antenna, a circuit arrangement, disposed on a second surface of the chip, including a shielding arrangement and a second antenna to receive the outbound signal, the circuit arrangement being operative to transmit a return signal from the second antenna to the first antenna, such that a breach in the shielding arrangement results in a change in, or cessation of, the return signal for detection by the signal analyzer, and a chip controller disposed on the first surface being operative to perform an action on the integrated circuit in response to the detection of the breach. Related apparatus and methods also included. | 01-01-2009 |
| 20090052656 | Method and System for Block Cipher Encryption - A method of encrypting a block of data, is described, the method including providing a combining unit operative to combine a key with a block of data, the block of data expressed as a block of bits, providing a mix and condense unit operative to mix bits included in the block of bits among themselves, receiving an input including the block of data expressed as the block of bits, combining, at the combining unit, the block of bits with a key, and mixing, at the mixing and condensing unit, the combined block of bits, wherein the mix and condense unit includes a plurality of layers, each layer among the plurality of layers including a plurality of mini-functions. Related apparatus and methods are described. | 02-26-2009 |
| 20090070596 | Secure Read-Write Storage Device - A method is described for securing a read write storage (RWS) device, the method comprising, providing the RWS device, the RWS device comprising a controller comprising a processor and a bit bucket and employing, in response to a decision making process, a sanction in the RWS device. Related apparatus and methods are also described. | 03-12-2009 |
| 20090080647 | Method and System for Usage of Block Cipher Encryption - A block cipher system for encrypting a plurality of blocks from plaintext to ciphertext, each of the blocks being associated with a constant root key, the system including an encryption key module to determine an input key for each of blocks based on a function having a plurality of inputs including the root key and an initialization vector, for a first one of the blocks, and the plaintext of at least one of the blocks which was previously encrypted and the root key, for the blocks other than the first block, and an encryption module to encrypt each of the blocks based on the input key determined for each of the blocks, respectively. Related apparatus and methods also included. | 03-26-2009 |
| 20090113556 | Disk Protection System - A method for protecting content on a medium ( | 04-30-2009 |
| 20090202070 | Robust Cipher Design - In an iterated block cipher, a method for round key encryption and key generation, the method including providing a first function Fi and a second function Fj, providing a round key generation function, the round key generation function being operative to utilize, in any given round, exactly one of the first function Fi, and the second function Fj, providing a round mixing function, the round mixing function being operative to utilize, in any given round, exactly one of the first function Fi, and the second function Fj, utilizing the round key generation function in at least a first round to generate a second round key for use in a second round, and utilizing the round mixing function in at least the first round to mix a first round key with a cipher state, wherein one of the following is performed in the first round the round key generation function utilizes the first function Fi to generate the second round key for use in the second round, substantially simultaneously with the round key mixing function utilizing the second function Fj to mix the first round key with the cipher state, and the round key generation function utilizes the second function Fj to generate the second round key for use in the second round, substantially simultaneously with the round key mixing function utilizing the first function Fi to mix the first round key with the cipher state. Related apparatus and methods are also described. | 08-13-2009 |
| 20110083194 | SECURITY WITHIN INTEGRATED CIRCUITS - A method for hindering detection of information unintentionally leaked from a secret held in a memory unit is described, the method including receiving a triggering event waiting for at least a first amount of time to pass after the receipt of the triggering event, the memory unit being in a non-operational state during the at least a first amount of time after the at least a first amount of time has passed, changing at least one first condition under which the memory unit operates, thereby causing the memory unit to enter an operational state, waiting for a second amount of time to pass after the changing at least one first condition, and changing, after the second amount of time, at least one second condition under which the memory unit operates, thereby causing the memory unit to enter the non-operational state, wherein access to the secret information is enabled only during the second amount of time, and detection of secret information unintentionally leaked is limited during the first amount of time. Related apparatus and methods are also described. | 04-07-2011 |
