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Ito, Chigasaki-Shi

Masataka Ito, Chigasaki-Shi JP

Patent application numberDescriptionPublished
20080263502MASK PATTERN DATA GENERATING METHOD, INFORMATION PROCESSING APPARATUS, PHOTOMASK FABRICATION SYSTEM, AND IMAGE SENSING APPARATUS - A method for generating mask pattern data of a photomask used to form microlenses divides a pattern formation surface of a mask pattern to be used for the photomask into a plurality of grid cells, acquires data which represents transmitted light distribution of the mask pattern to be used for the photomask, determines whether to place a shield on each of the plurality of grid cells by binarizing the plurality of grid cells in order of increasing or decreasing distance from a center of the pattern formation surface using an error diffusion method to acquire the transmitted light distribution, and generates mask pattern data which represents an arrangement of the shields based on results from the determining step.10-23-2008
20100214432DEVICE AND IMAGING SYSTEM - A device comprises a photoelectric conversion portion including a light receiving surface, and a condensing structure which condenses light to the photoelectric conversion portion, wherein in the condensing structure, a first insulating film and a second insulating film having a refractive index higher than that of the first insulating film are laid out in a plane perpendicular to a normal passing through a center of the light receiving surface such that a density of the second insulating film is higher in a central portion of the plane than in a peripheral portion of the plane, and a layout pattern of the first insulating film and the second insulating film in the plane includes a portion having a dimension not more than a maximum wavelength of a visible light range.08-26-2010

Rui Ito, Chigasaki-Shi JP

Patent application numberDescriptionPublished
20080198949RECEIVER, WIRELESS DEVICE AND METHOD FOR CANCELLING A DC OFFSET COMPONENT - A receiver includes a memory for storing DC offset amounts generated by an analog circuit; an amplifier; a DC offset amount generator for generating a first offset value and a second offset value to be removed from the received signal amplified at the amplifier; a first DC offset component-removing unit for removing the first DC offset value from the received signal before the amplifier; a second DC offset component-removing unit for removing the second DC offset value from the received signal after the amplifier; and an updating unit for updating the DC offset amount stored in the memory in view of the second DC offset value generated by the DC offset amount generator. A maximum value of the second DC offset value is set larger than a multiplication value of a gain of the amplifier by a minimum resolution value of the first DC offset value.08-21-2008
20080233906FREQUENCY CONVERTER, RADIO RECEIVER - Disclosed is a frequency converter including: a passive type analog multiplier configured to output a multiplication result in a current; a buffer outputting a buffering current by buffering the current of the multiplication result; and a current-voltage converter current-voltage converting the buffering current. Alternately, disclosed is a frequency converter including: a passive type analog multiplier configured to output a multiplication result in a current; a buffer outputting a buffering current by buffering the current of the multiplication result; and an integrator integrating the buffering current to output a voltage.09-25-2008
20080274714AMPLIFIER, FILTER USING THE SAME, AND RADIO COMMUNICATION DEVICE - An amplifier includes an amplification unit which amplify a first difference between first and second input signals, a second difference between second and third input signals and a third difference between third and first input signals by a differential mode gain, and amplify an average of the first, second and third input signal by a common mode gain, for outputting a first output signal corresponding to a sum of the amplified first difference and the amplified average, a second output signal corresponding to a sum of the amplified second difference and the amplified average, and a third output signal corresponding to a sum of the amplified third difference and amplified average; first, second; and a reduction circuit which reduces the common mode gain less than the differential mode gain.11-06-2008
20080309436MULTI-INPUT MULTI-OUTPUT AMPLIFIER, AN ACTIVE INDUCTOR, A FILTER AND A RADIO COMMUNICATION DEVICE - A non-inverting amplifier includes n external input terminals which receive n (n≧3) input voltage signals having a constant sum of voltages, respectively, n amplification units each including n−1 internal input terminals connected to n−1 terminals of the n external input terminals in a different combination for each of the amplification units, n−1 voltage-to-current converters which convert input voltage signals from the internal input terminals into current signals, and a load which converts an added current signal obtained by adding up the current signals into an output voltage signal, and n external output terminals which output n output voltage signals from the n amplification units.12-18-2008
20090111377FREQUENCY CONVERTER AND RECEIVER AND TRANSMITTER USING THE SAME - A frequency converter includes a voltage-current converter circuit which generates a positive-phase input current signal and a negative-phase input current signal, a switching circuit which switches between the positive-phase input current signal and the negative-phase input current signal according to a positive-phase local oscillator signal and a negative-phase local oscillator signal to generate a positive-phase output current signal and a negative-phase output current signal, an amplifier circuit which current-voltage converts and amplifies the positive-phase output current signal and negative-phase output current signal to generate a positive-phase output voltage signal and a negative-phase output voltage signal, and a plurality of CR circuits which are inserted at least either between the voltage-current converter circuit and the switching circuit or between the switching circuit and the amplifier circuit and each of which includes at least one capacitor through which high-frequency components pass and at least one resistance through which low-frequency noise components pass.04-30-2009
20090302949BIAS CIRCUIT AND AMPLIFIER USING THE SAME - A bias circuit including: a first current source which generates a first current; a second current source which generates a second current having a temperature-to-output current characteristic that an output current characteristic increases or decreases with a change in temperature to intersect with that of the first current; a first current-voltage conversion circuit which converts the first current to a first voltage; a second current-voltage conversion circuit which has an input terminal and converts a current inputted into the input terminal to a second voltage; a comparison circuit which compares the first voltage and the second voltage and generates a third current according to a result of the comparison; an addition unit which adds the third current to the second current and inputs a resulting current to the input terminal; and a voltage-current conversion circuit which converts the second voltage to a fourth current for bias.12-10-2009

Patent applications by Rui Ito, Chigasaki-Shi JP