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Ishigo
Kazutaka Ishigo, Mie JP
| Patent application number | Description | Published |
|---|---|---|
| 20100211352 | MARK ARRANGEMENT INSPECTING METHOD, MASK DATA, AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - A method of inspecting a mark arrangement according to an embodiment of the present invention includes: generating mask data in which mark seed data that includes an inspection mark that includes vector information and is not drawn on a mask and mark data is arranged on a scribe line of the mask, calculating coordinates of the inspection mark from a reference position of the mark seed data, detecting an arrangement state of the inspection mark with respect to the reference position by using the coordinates and vector information, and judging whether the mark seed data is correctly arranged by comparing the arrangement state of the inspection mark with an arrangement check rule. | 08-19-2010 |
| 20100291477 | PATTERN FORMING METHOD, PATTERN DESIGNING METHOD, AND MASK SET - A pattern designing method according to an embodiment of the present invention includes: designing a first pattern for inspection formed by arraying a plurality of first mark rows, in which rectangular marks are arrayed at predetermined intervals in a first direction, in a second direction perpendicular to the first direction and designing a second pattern for inspection formed by arraying, in the second direction, a plurality of second mark rows in which rectangular marks are arranged among the marks arrayed in the first direction of the first mark row and a forming position in the second direction is arranged to overlap the first mark row by predetermined overlapping length. | 11-18-2010 |
Kazutaka Ishigo, Yokkaichi-Shi JP
| Patent application number | Description | Published |
|---|---|---|
| 20090246709 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - A manufacturing method of a semiconductor device includes preparing a first circuit pattern original plate including a first pattern part of a mark pattern, preparing a second circuit pattern original plate including a second pattern part of the mark pattern, transferring the first pattern part to a mask film on an underlying area to form a first transfer pattern part in the mask film, transferring the second pattern part to the mask film to form a second transfer pattern part in the mask film, and patterning the underlying area by using the mask film including a transfer mark pattern, which is obtained by combining the first transfer pattern part and the second transfer pattern part, as a mask to form an underlying mark pattern in the underlying area. | 10-01-2009 |
Kazutaka Ishigo, Kanagawa-Ken JP
| Patent application number | Description | Published |
|---|---|---|
| 20080248431 | PATTERN FORMING METHOD USED IN SEMICONDUCTOR DEVICE MANUFACTURING AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A pattern forming method includes forming a first anti-reflection coating on a substrate, the substrate having an uneven surface; forming a second anti-reflection coating on the first anti-reflection coating, the first anti-reflection coating having an uneven surface, and the second anti-reflection coating planarizing the uneven surface of the first anti-reflection coating; forming an intermediate layer film on the second anti-reflection coating; forming a resist film on the intermediate-layer film; patterning the resist film to form a resist pattern; forming an intermediate-layer pattern by etching the intermediate-layer film using the resist pattern as a mask; and forming an under-layer pattern by etching the first and second anti-reflection coatings using the intermediate-layer pattern as a mask. | 10-09-2008 |
Kazutaka Ishigo, Yokohama-Shi JP
| Patent application number | Description | Published |
|---|---|---|
| 20080206898 | Pattern Monitor Mark and Monitoring Method Suitable for Micropattern - A method of forming a monitor mark includes forming an insulating film on a semiconductor substrate, and forming a first repetitive line pattern group and a second repetitive line pattern group by patterning the insulating film on the semiconductor substrate, such that the first repetitive line pattern group and the second repetitive line pattern group face each other with a predetermined space therebetween. | 08-28-2008 |
| 20080225254 | PHOTOMASK, PHOTOMASK SUPERIMPOSITION CORRECTING METHOD, AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - In a photomask in which a device pattern, an alignment mark and a superimposition inspection mark are formed on a light transmitting base, each of the alignment mark and the superimposition inspection mark includes a main mark portion, and first and second auxiliary pattern portions. The main mark portion is constituted of one of a space pattern and a line pattern, the pattern having a linear width to be resolved on a photosensitive film formed on a semiconductor wafer, and each of the first and second auxiliary pattern portions includes an auxiliary pattern constituted of one of a repeated pattern of a space pattern and a repeated pattern of a line pattern, the repeated pattern having a linear width not to be resolved on the photosensitive film. The pitch of the repeated pattern is equal to the minimum pitch of the device pattern. | 09-18-2008 |
Nancy Lynn Ishigo, Torrance, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20100002907 | MULTI-STAGE WATERMARKING PROCESS AND SYSTEM - A multi-stage watermarking system and process that creates a watermark specification which describes how to generate a watermark, generates a template specification which describes how to merge the watermark into a target document, generates the watermark based on the watermark specification, and merges the watermark into the target document based on the template specification to provide a watermarked document. | 01-07-2010 |