| Patent application number | Description | Published |
|---|
| 20080316835 | Concurrent Multiple-Dimension Word-Addressable Memory Architecture - An N-dimension addressable memory is disclosed. The memory includes an N-dimension array of bit cells and logic configured to address each bit cell using N-Dimension Addressing (NDA), where N is at least two and the array of bit cells is addressable by N orthogonal address spaces. Each bit cell of the N-dimension addressable memory includes a bit storage element, N word lines, and N bit lines. | 12-25-2008 |
| 20090082036 | DATA BOUNDARY AWARE BASE STATION ASSISTED POSITION LOCATION - The present invention is a novel and improved method and apparatus for performing position location in wireless communications system. One embodiment of the invention comprises a method for performing position location on a subscriber unit in a terrestrial wireless telephone system using a set of satellites each transmitting a signal, the terrestrial wireless telephone system having base stations, including the steps of transmitting an aiding message from the base station to the subscriber unit, said aiding message containing information regarding a data boundary for each signal from the set of satellites, applying correlation codes to each signal yielding corresponding correlation data and accumulating said correlation data over an first interval preceding a corresponding data boundary yielding a first accumulation result, and a second interval following said corresponding data boundary yielding a second accumulation result. | 03-26-2009 |
| 20090316840 | METHODS AND SYSTEMS FOR STC SIGNAL DECODING USING MIMO DECODER - Space time coding (STC) may be applied at the transmitter adding redundant information in both space and time dimensions. At the receiver, the received STC signal may be decoded using a spatial multiplexing MIMO decoding, for example, based on either Minimum Mean Square Error (MMSE) or maximum-likelihood (ML) algorithms. A selective STC decoder may incorporate both the conventional maximum ratio combining (MRC) decoding scheme and a MIMO decoding scheme. One of the STC decoding schemes may be selected, for example, based on estimated channel conditions in order to achieve a trade-off between error rate performance and computational complexity. Components used for a non-selected scheme may be powered down. | 12-24-2009 |
| 20100183096 | EFFICIENT MULTI-SYMBOL DEINTERLEAVER - Embodiments disclosed herein address the need in the art for an efficient multi-symbol deinterleaver. In one aspect, a plurality of memory banks are deployed to receive and simultaneously store a plurality of values, such as soft decision values determined from a modulation constellation, in accordance with a storing pattern. In another aspect, the storing pattern comprises a plurality of cycles, a selected subset of the plurality of memory banks and an address offset for use in determining the address for storing into the respective memory banks indicated for each cycle. In yet another aspect, the stored values may be accessed in order with a sequentially increasing index, such as an address. Various other aspects are also presented. These aspects have the benefit of allowing multiple symbol values to be deinterleaved in an efficient manner, thus meeting computation time constraints, and conserving power. | 07-22-2010 |
| 20110044380 | DYNAMICALLY CHANGING A TRANSMITTER SAMPLING FREQUENCY FOR A DIGITAL-TO-ANALOG CONVERTER (DAC) TO REDUCE INTERFERENCE FROM DAC IMAGES - A method for interference reduction is described. The method is implemented in a wireless device. It is determined that a page is going to be received via a secondary receiver. It is also determined that a digital-to-analog converter (DAC) image from a transmitter will cause interference with the secondary receiver when the page is received. A sampling frequency of the DAC for the transmitter is changed so that there are not any DAC images from the transmitter that will cause interference with the secondary receiver. | 02-24-2011 |
| 20110105070 | Direct conversion receiver architecture - A direct downconversion receiver architecture having a DC loop to remove DC offset from the signal components, a digital variable gain amplifier (DVGA) to provide a range of gains, an automatic gain control (AGC) loop to provide gain control for the DVGA and RF/analog circuitry, and a serial bus interface (SBI) unit to provide controls for the RF/analog circuitry via a serial bus. The DVGA may be advantageously designed and located as described herein. The operating mode of the VGA loop may be selected based on the operating mode of the DC loop, since these two loops interact with one another. The duration of time the DC loop is operated in an acquisition mode may be selected to be inversely proportional to the DC loop bandwidth in the acquisition mode. The controls for some or all of the RF/analog circuitry may be provided via the serial bus. | 05-05-2011 |
| 20110206151 | MULTI-TERM DEMAPPING FOR MULTI-CHANNEL WIRELESS COMMUNICATION - Providing for reduced complexity or improved accuracy in de-mapping received wireless data streams for multi-channel wireless communication is described herein. By way of example, a low-complexity likelihood algorithm can be employed to de-map data bits from the wireless data streams. In one particular example, the likelihood algorithm can approximate a received bit with a subset of received wireless symbols correlated the bit, reducing algorithm complexity. In other examples, a limited set of received wireless symbols can be employed for the subset, further reducing algorithm complexity. According to at least one other example, logarithmic terms of the algorithm can be approximated with non-logarithmic functions, such as a look-up table, series expansion, polynomial approximation, or the like. These approximations can enhance symbol de-mapping accuracy while maintaining or improving processing overhead for a wireless receiver. | 08-25-2011 |
| 20120033767 | SELECTIVE QUANTIZATION OF DECISION METRICS IN WIRELESS COMMUNICATION - A method for quantizing decision metrics (e.g., log likelihood ratios (LLRs)) for reduction of memory requirements in wireless communication is described. The method includes selecting a quantization algorithm. The quantization algorithm may be selected as a function of a characteristic of a decision metric representative of a transport block received over a communication channel, a characteristic of the transport block, or a condition of the communication channel. The method further includes quantizing the decision metric using the selected quantization algorithm to generate at least one quantized decision metric representative of the transport block. The method further includes storing the quantized decision metric and an indicia of the selected quantization algorithm to enable recovery of the decision metric representative of the transport block prior to decoding. | 02-09-2012 |
