Patent application number | Description | Published |
20090061087 | COMBINATORIAL PROCESS SYSTEM - A combinatorial processing chamber is provided. The combinatorial processing chamber is configured to isolate a radial portion of a rotatable substrate support, which in turn is configured to support a substrate. The chamber includes a plurality of clusters process heads in one embodiment. An insert having a base plate disposed between the substrate support and the process heads defines a confinement region for a deposition process in one embodiment. The base plate has an opening to enable access of the deposition material to the substrate. Through rotation of the substrate and movement of the opening, multiple regions of the substrate are accessible for performing combinatorial processing on a single substrate. | 03-05-2009 |
20090061108 | COMBINATORIAL PROCESS SYSTEM - A combinatorial processing chamber is provided. The combinatorial processing chamber is configured to isolate a radial portion of a rotatable substrate support, which in turn is configured to support a substrate. The chamber includes a plurality of clusters process heads in one embodiment. An insert having a base plate disposed between the substrate support and the process heads defines a confinement region for a deposition process in one embodiment. The base plate has an opening to enable access of the deposition material to the substrate. Through rotation of the substrate and movement of the opening, multiple regions of the substrate are accessible for performing combinatorial processing on a single substrate. | 03-05-2009 |
20090068849 | MULTI-REGION PROCESSING SYSTEM AND HEADS - The various embodiments of the invention provide for relative movement of the substrate and a process head to access the entire wafer in a minimal space to conduct combinatorial processing on various regions of the substrate. The heads enable site isolated processing within the chamber described and method of using the same are described. | 03-12-2009 |
20090069924 | COMBINATORIAL PROCESS SYSTEM - A combinatorial processing chamber is provided. The combinatorial processing chamber is configured to isolate a radial portion of a rotatable substrate support, which in turn is configured to support a substrate. The chamber includes a plurality of clusters process heads in one embodiment. An insert having a base plate disposed between the substrate support and the process heads defines a confinement region for a deposition process in one embodiment. The base plate has an opening to enable access of the deposition material to the substrate. Through rotation of the substrate and movement of the opening, multiple regions of the substrate are accessible for performing combinatorial processing on a single substrate. | 03-12-2009 |
20100163404 | Shadow Masks for Patterned Deposition on Substrates - A shadow mask for patterning a substrate during a semiconductor process. In one implementation, the shadow mask may include a plate having openings in the shape of individual dies on the substrate and having an area slightly greater than the substrate, and a layer having openings in the shape of features patterned on the substrate, wherein the layer is coupled to a bottom surface of the plate by an epoxy. | 07-01-2010 |
20110014359 | Yttrium and Titanium High-K Dielectric Film - This disclosure provides (a) methods of making an oxide layer (e.g., a dielectric layer) based on yttrium and titanium to have a high dielectric constant and low leakage characteristic and (b) related devices and structures. An oxide layer having both yttrium and titanium may be fabricated either as an amorphous oxide or as an alternating series of monolayers. In several embodiments, the oxide is characterized by a yttrium contribution to total metal that is specifically controlled. The oxide layer can be produced as the result of a reactive process, if desired, via either a PVD process or, alternatively, via an atomic layer deposition process that employs specific precursor materials to allow for a common process temperature window for both titanium and yttrium reactions. | 01-20-2011 |
20110209663 | Multi-Region Processing System and Heads - The various embodiments of the invention provide for relative movement of the substrate and a process head to access the entire wafer in a minimal space to conduct combinatorial processing on various regions of the substrate. The heads enable site isolated processing within the chamber described and method of using the same are described. | 09-01-2011 |
20120061799 | Yttrium and Titanium High-K Dielectric Films - This disclosure provides (a) methods of making an oxide layer (e.g., a dielectric layer) based on yttrium and titanium, to have a high dielectric constant and low leakage characteristic and (b) related devices and structures. An oxide layer having both yttrium and titanium may be fabricated either as an amorphous oxide or as an alternating series of monolayers. In several embodiments, the oxide is characterized by a yttrium contribution to total metal that is specifically controlled. The oxide layer can be produced as the result of a reactive process, if desired, via either a PVD process or, alternatively, via an atomic layer deposition process that employs specific precursor materials to allow for a common process temperature window for both titanium and yttrium reactions. | 03-15-2012 |
20120157367 | COMPOSITION AND METHOD FOR REMOVING PHOTORESIST AND BOTTOM ANTI-REFLECTIVE COATING FOR A SEMICONDUCTOR SUBSTRATE - A composition for removing photoresist and bottom anti-reflective coating from a semiconductor substrate is disclosed. The composition may comprise a nontoxic solvent, the nontoxic solvent having a flash point above 80 degrees Celsius and being capable of dissolving acrylic polymer and phenolic polymer. The composition may further comprise Tetramethylammonium Hydroxide (TMAH) mixed with the nontoxic solvent. | 06-21-2012 |
20130167867 | Composition And Method For Removing Photoresist And Bottom Anti-Reflective Coating For A Semiconductor Substrate - A composition for removing photoresist and bottom anti-reflective coating from a semiconductor substrate is disclosed. The composition may comprise a nontoxic solvent, the nontoxic solvent having a flash point above 80 degrees Celsius and being capable of dissolving acrylic polymer and phenolic polymer. The composition may further comprise Tetramethylammonium Hydroxide (TMAH) mixed with the nontoxic solvent. | 07-04-2013 |
20130244186 | Composition And Method For Removing Photoresist And Bottom Anti-Reflective Coating For A Semiconductor Substrate - A composition for removing photoresist and bottom anti-reflective coating from a semiconductor substrate is disclosed. The composition may comprise a nontoxic solvent, the nontoxic solvent having a flash point above 80 degrees Celsius and being capable of dissolving acrylic polymer and phenolic polymer. The composition may further comprise Tetramethylammonium Hydroxide (TMAH) mixed with the nontoxic solvent. | 09-19-2013 |
20130333611 | LATTICE MATCHING LAYER FOR USE IN A MULTILAYER SUBSTRATE STRUCTURE - A lattice matching layer for use in a multilayer substrate structure comprises a lattice matching layer. The lattice matching layer includes a first chemical element and a second chemical element. Each of the first and second chemical elements has a hexagonal close-packed structure at room temperature that transforms to a body-centered cubic structure at an α-β phase transition temperature higher than the room temperature. The hexagonal close-packed structure of the first chemical element has a first lattice parameter. The hexagonal close-packed structure of the second chemical element has a second lattice parameter. The second chemical element is miscible with the first chemical element to form an alloy with a hexagonal close-packed structure at the room temperature. A lattice constant of the alloy is approximately equal to a lattice constant of a member of group III-V compound semiconductors. | 12-19-2013 |
20130334568 | MULTILAYER SUBSTRATE STRUCTURE AND METHOD OF MANUFACTURING THE SAME - A multilayer substrate structure comprises a substrate, a thermal matching layer formed on the substrate and a lattice matching layer above the thermal matching layer. The thermal matching layer includes at least one of molybdenum, molybdenum-copper, mullite, sapphire, graphite, aluminum-oxynitrides, silicon, silicon carbide, zinc oxides, and rare earth oxides. The lattice matching layer includes a first chemical element and a second chemical element to form an alloy. The first and second chemical element has similar crystal structures and chemical properties. The coefficient of thermal expansion of the thermal matching layer and the lattice parameter of the lattice matching layer are both approximately equal to that of a member of group III-V compound semiconductors. The lattice constant of the lattice matching layer is approximately equal to that of a member of group III-V compound semiconductor. | 12-19-2013 |
20140251205 | METHODS AND SYSTEMS FOR THIN FILM DEPOSITION PROCESSES - A system for depositing a film on a substrate comprises a lateral control shutter disposed between the substrate and a material source. The lateral control shutter is configured to block some predetermined portion of source material to prevent deposition of source material onto undesirable portion of the substrate. One of the lateral control shutter or the substrate moves with respect to the other to facilitate moving a lateral growth boundary originating from one or more seed crystals. A lateral epitaxial deposition across the substrate ensues, by having an advancing growth front that expands grain size and forms a single crystal film on the surface of the substrate. | 09-11-2014 |
20140311408 | Multi-Region Processing System and Heads - The various embodiments of the invention provide for relative movement of the substrate and a process head to access the entire wafer in a minimal space to conduct combinatorial processing on various regions of the substrate. The heads enable site isolated processing within the chamber described and method of using the same are described. | 10-23-2014 |
20150025670 | Substrate Processing Including Correction for Deposition Location - Substrate processing including correction for deposition location is described, including a combinatorial processing chamber that incorporates the correction. The combinatorial processing chamber can be used to process multiple regions of a substrate using different processing parameters on different regions. For example, one region can have one material deposited on it and another region can have a different material deposited on it, although other combinations and variations are possible. The combinatorial processing chamber uses a rotating and revolving substrate pedestal to be able to deposit on all locations or positions on a substrate. The combinatorial processing chamber uses a correction factor that accounts for variations in alignment and/or configuration of the processing chamber so that the actual location of deposition of a region is approximately the same as a desired location of deposition. | 01-22-2015 |
20150031148 | Shadow Mask for Patterned Deposition on Substrates - A method for performing a physical vapor deposition (PVD) on a substrate is disclosed, comprising placing a substrate on a susceptor disposed below one or more PVD guns and below a plasma shield assembly having a bellows and a shadow mask coupled to a bottom side of the bellows, lowering the bellows toward the substrate to place the shadow mask in contact with the substrate; and depositing a material on an isolated region on the substrate through the shadow mask. In one implementation, the shadow mask may include a plate having openings in the shape of individual dies on the substrate, and a layer having openings in the shape of features patterned on the substrate, wherein the layer is coupled to a bottom surface of the plate by an epoxy. | 01-29-2015 |