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| 20090040741 | METHOD FOR TRANSMITTING MOVING IMAGE DATA AND COMMUNICATION APPARATUS - A multilayered printed circuit board includes a first surface layer that includes a semiconductor integrated circuit, a second surface layer that includes a bypass capacitor and that is opposite to the first surface layer, a main power supply wiring layer, and a ground layer between the first and second surface layers. In the multilayered printed circuit board, one terminal of the bypass capacitor is connected to a midpoint of a wiring path from the main power supply wiring layer to a power supply terminal of the semiconductor integrated circuit, and an impedance of a first wiring path from the main power supply wiring layer to the terminal of the bypass capacitor is higher than an impedance of a second wiring path from the terminal of the bypass capacitor to the power supply terminal of the semiconductor integrated circuit. | 02-12-2009 |
| 20090200666 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A semiconductor integrated circuit device is provided which comprises a semiconductor chip having wire bonding pads and a package encapsulating the semiconductor chip and connected via bonding wires to the wire bonding pads, wherein wire bonding pads on the semiconductor chip are arranged in two rows in a staggered manner along a periphery of the semiconductor chip, and of the wire bonding pads, power supply pads are arranged in a rear row located close to a semiconductor integrated circuit unit as an active area on the semiconductor chip and in a front row, only signal pads are arranged. Because the power supply pads are provided in the rear row, the line width of a power supply line led out from each power supply pad can be made equal to the width of the pad, thus reducing the impedance of the connection circuit between the semiconductor chip and the package, and suppressing generation of radiation noise, ground bounce and so on. | 08-13-2009 |
| 20100128451 | MULTILAYERED PRINTED CIRCUIT BOARD - A multilayered printed circuit board includes a first surface layer that includes a semiconductor integrated circuit, a second surface layer that includes a bypass capacitor and that is opposite to the first surface layer, a main power supply wiring layer, and a ground layer between the first and second surface layers. In the multilayered printed circuit board, one terminal of the bypass capacitor is connected to a midpoint of a wiring path from the main power supply wiring layer to a power supply terminal of the semiconductor integrated circuit, and an impedance of a first wiring path from the main power supply wiring layer to the terminal of the bypass capacitor is higher than an impedance of a second wiring path from the terminal of the bypass capacitor to the power supply terminal of the semiconductor integrated circuit. | 05-27-2010 |
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| 20090133603 | ELECTROLESS PALLADIUM PLATING BATH AND ELECTROLESS PALLADIUM PLATING METHOD - Disclosed is an electroless palladium plating bath containing a palladium compound, at least one complexing agent selected from ammonia and amine compounds, at least one reducing agent selected from phosphinic acid and phosphinates, and at least one unsaturated carboxylic acid compound selected from unsaturated carboxylic acids, unsaturated carboxylic acid anhydrides, unsaturated carboxylates and unsaturated carboxylic acid derivatives. Such an electroless palladium plating bath has high bath stability, and decomposition of the bath hardly occurs. Consequently, the electroless palladium plating bath of the present invention has a longer bath life than conventional electroless palladium plating baths. In addition, this electroless palladium plating bath enables to obtain excellent solder bonding characteristics and wire bonding characteristics since it does not affect plating film characteristics even when it is used for a long time. | 05-28-2009 |
| 20100136244 | ELECTROLESS NICKEL PLATING BATH AND METHOD FOR ELECTROLESS NICKEL PLATING - Disclosed is an electroless nickel plating bath not containing harmful metal species. In the electroless nickel plating bath, there are contained at least an iron ion source and an iodide ion source. With the use of the electroless nickel plating bath containing at least the iron ion source and the iodide ion source, it is possible to suppress decomposition of the plating bath without using harmful metal species to stabilize the plating bath. | 06-03-2010 |
| 20110315658 | ALUMINUM OXIDE FILM REMOVER AND METHOD FOR SURFACE TREATMENT OF ALUMINUM OR ALUMINUM ALLOY - Disclosed herein is an aluminum oxide film remover for removing an oxide film on the surface of aluminum or aluminum alloy, which comprises silver ions and/or copper ions, a solubilizing agent for silver ions and/or copper ions, and a quaternary ammonium hydroxide compound, and has a pH value of 10 to 13.5. A method for surface treatment of aluminum or aluminum alloy is also disclosed, which comprises immersing a workpiece having aluminum or aluminum alloy at least on the surface thereof in the aluminum oxide film remover, and depositing the silver and/or copper contained in the remover on the surface of aluminum or aluminum alloy while removing the aluminum oxide film. | 12-29-2011 |
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| 20080233696 | Semiconductor device and method for fabricating the same - Described is a method for fabricating a semiconductor device having an FET of a trench-gate structure obtained by disposing a conductive layer, which will be a gate, in a trench extended in the main surface of a semiconductor substrate, wherein the upper surface of the trench-gate conductive layer is formed equal to or higher than the main surface of the semiconductor substrate. In addition, the conductive layer of the trench gate is formed to have a substantially flat or concave upper surface and the upper surface is formed equal to or higher than the main surface of the semiconductor substrate. Moreover, after etching of the semiconductor substrate to form the upper surface of the conductive layer of the trench gate equal to or higher than the main surface of the semiconductor substrate, a channel region and a source region are formed by ion implantation. The semiconductor device thus fabricated according to the present invention is free from occurrence of a source offset. | 09-25-2008 |
| 20100320533 | INSULATED GATE TYPE SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - In an insulated-gate type semiconductor device in which a gate-purpose conductive layer is embedded into a trench which is formed in a semiconductor substrate, and a source-purpose conductive layer is provided on a major surface of the semiconductor substrate, a portion of a gate pillar which is constituted by both the gate-purpose conductive layer and a cap insulating film for capping an upper surface of the gate-purpose conductive layer is projected from the major surface of the semiconductor substrate; a side wall spacer is provided on a side wall of the projected portion of the gate pillar; and the source-purpose conductive layer is connected to a contact region of the major surface of the semiconductor substrate, which is defined by the side wall spacer. | 12-23-2010 |
| 20110076818 | INSULATED GATE TYPE SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - In an insulated-gate type semiconductor device in which a gate-purpose conductive layer is embedded into a trench which is formed in a semiconductor substrate, and a source-purpose conductive layer is provided on a major surface of the semiconductor substrate, a portion of a gate pillar which is constituted by both the gate-purpose conductive layer and a cap insulating film for capping an upper surface of the gate-purpose conductive layer is projected from the major surface of the semiconductor substrate; a side wall spacer is provided on a side wall of the projected portion of the gate pillar; and the source-purpose conductive layer is connected to a contact region of the major surface of the semiconductor substrate, which is defined by the side wall spacer. | 03-31-2011 |
| 20120015492 | INSULATED GATE TYPE SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - In an insulated-gate type semiconductor device in which a gate-purpose conductive layer is embedded into a trench which is formed in a semiconductor substrate, and a source-purpose conductive layer is provided on a major surface of the semiconductor substrate, a portion of a gate pillar which is constituted by both the gate-purpose conductive layer and a cap insulating film for capping an upper surface of the gate-purpose conductive layer is projected from the major surface of the semiconductor substrate; a side wall spacer is provided on a side wall of the projected portion of the gate pillar; and the source-purpose conductive layer is connected to a contact region of the major surface of the semiconductor substrate, which is defined by the side wall spacer. | 01-19-2012 |
| 20120139040 | INSULATED GATE TYPE SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - In an insulated-gate type semiconductor device in which a gate-purpose conductive layer is embedded into a trench which is formed in a semiconductor substrate, and a source-purpose conductive layer is provided on a major surface of the semiconductor substrate, a portion of a gate pillar which is constituted by both the gate-purpose conductive layer and a cap insulating film for capping an upper surface of the gate-purpose conductive layer is projected from the major surface of the semiconductor substrate; a side wall spacer is provided on a side wall of the projected portion of the gate pillar; and the source-purpose conductive layer is connected to a contact region of the major surface of the semiconductor substrate, which is defined by the side wall spacer. | 06-07-2012 |
| 20120142156 | INSULATED GATE TYPE SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - In an insulated-gate type semiconductor device in which a gate-purpose conductive layer is embedded into a trench which is formed in a semiconductor substrate, and a source-purpose conductive layer is provided on a major surface of the semiconductor substrate, a portion of a gate pillar which is constituted by both the gate-purpose conductive layer and a cap insulating film for capping an upper surface of the gate-purpose conductive layer is projected from the major surface of the semiconductor substrate; a side wall spacer is provided on a side wall of the projected portion of the gate pillar; and the source-purpose conductive layer is connected to a contact region of the major surface of the semiconductor substrate, which is defined by the side wall spacer. | 06-07-2012 |
| 20120289013 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device has an FET of a trench-gate structure obtained by disposing a conductive layer, which will be a gate, in a trench extended in the main surface of a semiconductor substrate, wherein the upper surface of the trench-gate conductive layer is formed equal to or higher than the main surface of the semiconductor substrate. The conductive layer of the trench gate is formed to have a substantially flat or concave upper surface and the upper surface is formed equal to or higher than the main surface of the semiconductor substrate. After etching of the semiconductor substrate to form the upper surface of the conductive layer of the trench gate, a channel region and a source region are formed by ion implantation so that the semiconductor device is free from occurrence of a source offset. | 11-15-2012 |
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| 20100193863 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - Described is a method for fabricating a semiconductor device having an FET of a trench-gate structure obtained by disposing a conductive layer, which will be a gate, in a trench extended in the main surface of a semiconductor substrate, wherein the upper surface of the trench-gate conductive layer is formed equal to or higher than the main surface of the semiconductor substrate. In addition, the conductive layer of the trench gate is formed to have a substantially flat or concave upper surface and the upper surface is formed equal to or higher than the main surface of the semiconductor substrate. Moreover, after etching of the semiconductor substrate to form the upper surface of the conductive layer of the trench gate equal to or higher than the main surface of the semiconductor substrate, a channel region and a source region are formed by ion implantation. The semiconductor device thus fabricated according to the present invention is free from occurrence of a source offset. | 08-05-2010 |
| 20110140198 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - Described is a method for fabricating a semiconductor device having an FET of a trench-gate structure obtained by disposing a conductive layer, which will be a gate, in a trench extended in the main surface of a semiconductor substrate, wherein the upper surface of the trench-gate conductive layer is formed equal to or higher than the main surface of the semiconductor substrate. In addition, the conductive layer of the trench gate is formed to have a substantially flat or concave upper surface and the upper surface is formed equal to or higher than the main surface of the semiconductor substrate. Moreover, after etching of the semiconductor substrate to form the upper surface of the conductive layer of the trench gate equal to or higher than the main surface of the semiconductor substrate, a channel region and a source region are formed by ion implantation. The semiconductor device thus fabricated according to the present invention is free from occurrence of a source offset. | 06-16-2011 |
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| 20090278362 | CYCLOCONVERTER GENERATOR - In a cycloconverter generator, AC power required by the load is detected and a desired speed of the engine is determined based on the required AC power, operation of an actuator is controlled such that the engine speed becomes equal to the desired engine speed, and the required AC power is generated by turning on switching elements (thyristors) such that a number of the phase signal within one period of frequency of the AC power, becomes equal to a number determined by the desired engine speed, thereby preventing undesirable increase in fuel consumption and noise by operating the engine at a speed corresponding to required AC power and enabling to generate stable AC power even when the engine speed changes abruptly. | 11-12-2009 |
| 20090279338 | CYCLOCONVERTER GENERATOR - In a cycloconverter generator, there are provided, q number of power circuits that supply rectified DC power of a DC power supply unit as operating power to the p (p>q) number of thyristors, and r (p>r) number of thyristor drive circuits that are connected to the q number of the power circuits and drive the p number of the thyristors, wherein the r number of the thyristors drive circuits are individually used to drive in common ones among the p number of the thyristors whose operation is unaffected even if driven at the same timing such that the number r of the drive circuits is made smaller than the number p of the thyristors, thereby enabling to simplify circuit configuration. | 11-12-2009 |
| 20090279339 | CYCLOCONVERTER GENERATOR - In a cycloconverter generator equipped with an AC power generator that generates single-phase AC power to be supplied to a load by turning on positive and negative switching elements at variable timing every half-period of a desired AC power frequency based on a phase signal and a DC power generator that generates DC power by turning on the positive switching elements in accordance with a timing determined by desired DC voltage, there is installed with a selection switch that is installed to be operable by an user and produces an output indicative of a result of the user's selection between the AC power and DC power thereby enabling to the user to easily select either one of alternating current and direct current. | 11-12-2009 |
| 20100283625 | REMOTE OPERATION APPARATUS OF WORKING MACHINE - In a remote operation apparatus of a working machine including a working machine side transmission/reception unit ( | 11-11-2010 |
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| 20100126523 | TWO-PART HAIR DYE OR BLEACH COMPOSITION - Foam quality and discharge properties are improved by using a squeeze container to discharge a mixed solution of first and second agents of a two-part hair cosmetic for hair dyeing or bleaching in a foam. A two-part hair cosmetic | 05-27-2010 |
| 20110019945 | BAG CONTAINER - A bag container includes a synthetic-resin container body shaped by using a mold and including a body portion including a bottom portion and a spout-forming portion. A spout is formed by tearing an easy-to-tear portion of the spout-forming portion and removing a to-be-torn-off portion. The spout-forming portion is provided projecting upward, perpendicular to a placing surface formed by the bottom portion, from the body portion. An opening tab piece including an engagement hole with which the ball of a finger is to engage is provided projecting on one side of the spout-forming portion. The engagement hole has a shape that guides the finger such that, when the easy-to-tear portion is to be torn, the ball of the finger engages with a circumferential edge portion of the engagement hole from the inner side thereof while being oriented toward the circumferential direction centering about an end of the easy-to-tear portion. | 01-27-2011 |
| 20110026859 | BAG CONTAINER - A bag container including a synthetic-resin container body shaped by using a mold and including a spout-forming portion and a filling inlet portion that project outward therefrom. Contents are first filled through the filling inlet portion, and then fusion-bond sealing is applied to the filling inlet portion. The filling inlet portion has, at its sealing base portion, a square cross-sectional shape. A tip-end-side cross-section-changing portion and a cylindrical portion are provided on the tip-end side with respect to the sealing base portion. Four triangular panels each isosceles triangle shaped are connectedly provided on the side of the container body with respect to the sealing base portion along a circumferential direction of the filling inlet portion, a base of each isosceles triangle formed of one of sides of the square cross-sectional shape. When the fusion-bond sealing is to be applied to the filling inlet portion, a region on the tip-end side with respect to the sealing base portion is folded flat while positioning a pair of opposing corners on opposite edges of the filling inlet portion. | 02-03-2011 |
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| 20080225905 | APPARATUS, METHOD AND PROGRAM FOR IMAGE FORMING - An image forming apparatus includes a scanning unit that deflects and scans a laser beam emitted from a laser beam source, an optical system that guides the laser beam onto a photoconductive drum, a storing unit that stores plural correction patterns that give a series of correction values for correcting an amount of laser beams in one scanning, a selecting unit that selects a correction group including at least two kinds of correction patterns out of the stored correction patterns, a switching unit that switches the at least two kinds of correction patterns belonging to the selected group at predetermined timing, a correcting unit that corrects, on the basis of the correction patterns switched by the switching unit, an amount of laser beams being scanned, and a printing unit that prints, on one medium, plural images formed on the photoconductive drum by laser beams corrected by the respective correction patterns. | 09-18-2008 |
| 20080273076 | LIGHT BEAM SCANNING APPARATUS AND IMAGE FORMING APPARATUS - An image forming apparatus is provided with a modulator producing a modulated signal of a pulse width decided on given image data and a driver driving an optical generator such as laser to generate a light beam. The image forming apparatus is further provided with a scanner periodically scanning the light beam generated by the optical generator and a power detector detecting information indicative of a power of the light beam scanned by the scanner. A pulse width adjustor uses the information detected by the power detector, in order to adjust the pulse width of the light beam. | 11-06-2008 |
