| Patent application number | Description | Published |
|---|
| 20090215229 | Board on chip package and method of manufacturing the same - A ball grid array type board on chip package may include an integrated circuit chip having an active surface that supports a plurality of contact pads. An interposer may be adhered to the active surface of the integrated circuit chip. At least one hole may be provided through the interposer to expose the contact pads. A board, which may have a first surface supporting a plurality of metal lines, may have a second surface adhered to the interposer. The board may have an opening through which the contact pads may be exposed. A plurality of bonding wires may connect the contact pads to the metal lines through the opening. | 08-27-2009 |
| 20100252935 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - Provided are a semiconductor device and a method for fabricating the same according to an embodiment. In the method, a portion of a substrate comprising a pad is removed to form a via hole. An insulating layer is formed on the substrate. A portion of the insulating layer is removed to form an opening part comprising a plurality of openings exposing portions of the pad. A through electrode is formed to fill the via hole and to be electrically connected to the pad through one of the plurality of openings. A portion of the pad is exposed by another opening among the plurality of openings. | 10-07-2010 |
| 20100285635 | CHIP STACK PACKAGE AND METHOD OF MANUFACTURING THE CHIP STACK PACKAGE - A chip stack package includes a substrate, a plurality of chips, a plurality of adhesive layers and a plug. The substrate has a wiring pattern and a seed layer formed on the wiring pattern. Each of the chips has an electrode pad and a first through-hole that penetrates the electrode pad. The chips are stacked such that the first through-holes are aligned on the seed layer of the substrate. The adhesive layers are interposed between the substrate and one of the chips, as well as between the chips. Each of the adhesive layers has a second through-hole connected to the first through-hole. The plug fills up the first through-holes and the second through-holes and electrically connects the electrode pads to the wiring pattern of the substrate. A cross-sectional area of the plug in the second through-holes may be larger than that of the plug in the first through-holes. | 11-11-2010 |
| 20100327422 | SEMICONDUCTOR CHIP, METHOD OF FABRICATING THE SAME, AND STACK MODULE AND MEMORY CARD INCLUDING THE SAME - A semiconductor chip, a method of fabricating the same, and a stack module and a memory card including the semiconductor chip include a first surface and a second surface facing the first surface is provided. At least one via hole including a first portion extending in a direction from the first surface of the substrate to the second surface of the substrate and a second portion that is connected to the first portion and has a tapered shape. At least one via electrode filling the at least one via hole is provided. | 12-30-2010 |
| 20110086849 | NOVEL BENZOXAZINE BENZIMIDAZOLE DERIVATIVE, A PHARMACEUTICAL COMPOSITION COMPRISING THE SAME, AND AUSE THEREOF - The present invention relates to a novel benzoxazine benzimidazole derivative of formula (1) as an antagonist against a vanilloid receptor-1, a pharmaceutical composition comprising the same as an active ingredient, and a use thereof. The benzoxazine benzimidazole derivative of the present invention may be useful for preventing or treating a disease associated with antagonistic activity of vanilloid receptor-1: | 04-14-2011 |
| 20110097846 | SEMICONDUCTOR CHIP, WAFER STACK PACKAGE USING THE SAME, AND METHODS OF MANUFACTURING THE SAME - A semiconductor chip comprises a substrate including a front surface and a rear surface, the substrate having a first via hole formed in the front surface and a second via hole formed in the rear surface, a first conductive plug formed on the substrate, the first conductive plug including a first portion formed in the first via hole and a second portion protruding from the front surface of the substrate, and a second conductive plug formed on the first conductive plug, the second conductive plug having a smaller cross-sectional area than the first conductive plug. | 04-28-2011 |
