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In Sun
In Sun Cho, Namyangju-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20090114604 | Method and System for Photocatalytically Decomposing Organic Pollutants Using Electromotive Force of Solar Cell - The present invention relates to a method and system for photocatalytically decomposing organic pollutants using the electromotive force of a solar cell. The present invention provides a method and system for decomposing organic pollutants, which can greatly increase the rate of decomposition of organic pollutants at low cost by combining a photocatalytic organic pollutant decomposition device, capable of decomposing organic pollutants using light energy, with a solar cell, capable of applying an external voltage to the photocatalytic organic pollutant decomposition device using light energy. | 05-07-2009 |
| 20090192032 | Visible light-responsive photocatalyst composition containing tungsten-based oxides and method of producing the same - Disclosed herein is a light-responsive photocatalyst composition, which is a composite oxide semiconductor containing tungsten, and which can efficiently absorb visible light emitted from the sun and light emitted from interior lamps, such as fluorescent lamps, etc., and a method of preparing the light-responsive photocatalyst composition. The visible light-responsive photocatalyst composition can decompose volatile organic compounds or harmful organic matter causing sick house syndrome, even indoors, because it can be activated by visible light outdoors and can respond to light emitted from interior lamps, such as fluorescent lamps, etc. | 07-30-2009 |
In Sun Lee, Seongnam-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20090170545 | COGNITIVE RADIO COMMUNICATION APPARATUS AND METHOD WHICH ADAPTABLY CONTROLS SENSING REFERENCE LEVEL - A cognitive radio communication apparatus and method which adaptably controls a sensing reference level based on a transmission power of a transmitter is provided. A cognitive radio communication apparatus includes a sensing reference level control unit to adaptably control a sensing reference level based on a transmission power of a secondary transmitter included in a secondary network, and a fast sensing unit to determine whether a signal received for a predetermined time period exists based on the controlled sensing reference level. | 07-02-2009 |
| 20090186646 | COGNITIVE RADIO COMMUNICATION METHOD FOR CONTROLLING SENSING OPERATION AND COGNITIVE RADIO COMMUNICATION APPARATUS ENABLING THE METHOD - A cognitive radio communication apparatus and method to control a sensing operation. The cognitive radio communication apparatus includes an information receiver to receive channel state information associated with a channel occupancy state of a primary system from at least one sensing node of a secondary system; a sensing control unit to control a sensing period of the at least one sensing node according to a change pattern of the channel occupancy state, based on the channel state information; and a control information transmitter to transmit control information associated with the controlled sensing period to at least one member node of the secondary system. | 07-23-2009 |
| 20090209265 | MOBILE SYSTEM AND BASE STATION SYSTEM FOR EFFECTIVELY USING LICENSED SPECTRUM AND SHARED SPECTRUM - A mobile system and a base station system for effectively using a licensed spectrum and a shared spectrum are provided. The mobile system includes: an initialization unit to initialize transmitting and receiving of data using at least one of the licensed spectrum and the shared spectrum; a sensing unit to sense a spectrum for transmitting and receiving of the data via the at least one spectrum; and a transceiver to transmit and receive the data via the sensed spectrum. | 08-20-2009 |
| 20110064062 | FREQUENCY BAND SETTING APPARATUS AND METHOD, ACCESS POINT, AND FREQUENCY BAND USING METHOD OF ACCESS POINT - A frequency band setting apparatus and method are provided. The frequency band setting apparatus may include a calculation unit and a control unit. The calculation unit may calculate a basic frequency band of each of a plurality of Access Points (APs), and the control unit may divide a frequency band, which is available to the plurality of APs, into each of the calculated basic frequency bands and a common frequency band. | 03-17-2011 |
| 20110164621 | COMMUNICATION METHOD FOR RELAY NODE AND NEXT NODE OF THE RELAY NODE FOR NETWORK CODING - Provided is a communication method of a relay node for network coding, including determining one of a plurality of nodes included in a mesh network as a relay node to perform network coding; determining, by the relay node among the plurality of nodes, nodes capable of participating in the network coding; and performing the network coding with respect to the nodes capable of participating in the network coding. | 07-07-2011 |
In Sun Lee, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20090117914 | FREQUENCY SPECTRUM SENSING METHOD USING PILOT SIGNAL AND COGNITIVE RADIO SYSTEM USING THE SAME - An operation method of a radio communication station is provided. The operation method of a radio communication station, the operation method including: transmitting a basic pilot signal to at least one terminal located in a coverage of a preoccupied system; and transmitting a cognitive radio (CR) pilot signal. | 05-07-2009 |
| 20090124206 | PILOT SIGNAL POWER CONTROL APPARATUS AND OPERATION METHOD OF PILOT SIGNAL POWER CONTROL APPARATUS - A pilot signal power control apparatus to determine a power level of a pilot signal of a primary network to indicate an availability of a wireless resource of thereof to a secondary user of a secondary network according to a cognitive radio technology, the pilot signal power control apparatus and an operation method thereof, the pilot signal power control apparatus including: a prediction unit to predict a noise increase and/or a sensing probability, the noise increase occurring in a primary user of the primary network due to a channel estimation error, and the sensing probability being a probability that a secondary user senses the pilot signal of; a channel capacity calculation unit to calculate a channel capacity of the primary user based on the predicted noise increase and/or sensing probability; and a power level determination unit to determine the power level of the pilot signal using the calculated channel capacity. | 05-14-2009 |
In Sun Song, Gumi-City KR
| Patent application number | Description | Published |
|---|---|---|
| 20090249208 | METHOD AND DEVICE FOR REPRODUCING IMAGES - A video reproduction control method comprising providing a list of at least one recorded program with a plurality of thumbnail images that correspond to different time points in the program, selecting a first thumbnail image, and reproducing the program from a first point in time that corresponds to the first thumbnail image. | 10-01-2009 |
In-Sun Hwang, Yeongtong-Gu KR
| Patent application number | Description | Published |
|---|---|---|
| 20100053502 | PRISM SHEET AND LIQUID CRYSTAL DISPLAY HAVING THE SAME - Disclosed are a prism sheet and a liquid crystal display having the same. The prism sheet includes a base and a plurality of prism mountains. The base includes a front surface and a rear surface facing the front surface. The prism mountains are integrally formed with the base on the rear surface of the base. At least one prism mountain includes a plurality of light incidence surfaces and a reflective surface. The light incidence surfaces receive light. The reflective surface is adjacent to one of the light incidence surfaces to reflect the light. A vertical angle of the prism mountains formed between the light incidence surface adjacent to the reflective surface and the reflective surface, is in a range of about 70° to about 100°. | 03-04-2010 |
In-Sun Jung, Suwon-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20100167212 | RESIST UNDERLAYER COMPOSITION AND METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE USING THE SAME - A resist underlayer composition and a method of manufacturing a semiconductor integrated circuit device, the resist underlayer composition including a solvent and an organosilane-based polymer, the organosilane-based polymer being a polymerization product of at least one first compound represented Chemical Formulae 1 to 3 and at least one second compound represented by Chemical Formulae 4 and 5. | 07-01-2010 |
| 20100197089 | METHODS OF FABRICATING SEMICONDUCTOR DEVICES WITH METAL-SEMICONDUCTOR COMPOUND SOURCE/DRAIN CONTACT REGIONS - Methods of fabricating semiconductor devices include forming a transistor on and/or in a semiconductor substrate, wherein the transistor includes a source/drain region and a gate pattern disposed on a channel region adjacent the source/drain region. An insulating layer is formed on the transistor and patterned to expose the source/drain region. A semiconductor source layer is formed on the exposed source/drain region and on an adjacent portion of the insulating layer. A metal source layer is formed on the semiconductor source layer. Annealing, is performed to form a first metal-semiconductor compound region on the source/drain region and a second metal-semiconductor compound region on the adjacent portion of the insulating layer. The first metal-semiconductor compound region may be thicker than the second metal-semiconductor compound region. The metal source layer may include a metal layer and a metal nitride barrier layer. | 08-05-2010 |
In-Sun Kang, Seoul KR
| Patent application number | Description | Published |
|---|---|---|
| 20090013139 | APPARATUS AND METHOD TO PREVENT DATA LOSS IN NONVOLATILE MEMORY - An apparatus for preventing data loss of a nonvolatile memory device and a method thereof are presented The apparatus includes a nonvolatile memory including a memory cell which writes bit information to a first page and a second page included in a first block using plural states which are implemented using at least 2 bits, and a data-processing unit which writes the bit information of the first page to a second block in the nonvolatile memory while the bit information is written to the second page after the bit information is written to the first page. | 01-08-2009 |
In-Sun Kim, Daejeon KR
| Patent application number | Description | Published |
|---|---|---|
| 20100097163 | RESONATOR HAVING A THREE DIMENSIONAL DEFECTED GROUND STRUCTURE IN TRANSMISSION LINE - A resonator having a three dimensional Defected Ground Structure (DGS) in the transmission line includes a substrate installed at the center of the resonator floating in the air through supporting members installed on both ends of the substrate; a transmission line for transmitting signals installed on the upper surface of the substrate; an upper ground plane member installed on the upper surface of the substrate with predetermined interval from the surface of the substrate, wherein a DGS pattern with a predetermined shape is formed on each portion of the body of the ground plane member symmetrically with respect to the transmission line to form a resonator; a lower ground plane member installed on the lower surface of the substrate with predetermined interval from the surface of the substrate, wherein a DGS pattern with a predetermined shape is formed on each portion of the body of the ground plane member symmetrically with respect to the transmission line to form a resonator; an upper cover installed closely contacting the upper surface of the upper ground plane member to seal the upper opening of the DGS pattern formed on the upper ground plane member and to protect the upper ground plane member at the same time; and a lower cover installed closely contacting the lower surface of the lower ground plane member to seal the lower opening of the DGS pattern formed on the lower ground plane member and to protect the lower ground plane member at the same time. | 04-22-2010 |
In-Sun Park, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20080230373 | METHODS OF FORMING A PHASE-CHANGE MATERIAL LAYER INCLUDING TELLURIUM AND METHODS OF MANUFACTURING A PHASE-CHANGE MEMORY DEVICE USING THE SAME - The present invention provides methods of forming a phase-change material layer including providing a substrate and a chalcogenide target including germanium (Ge), antimony (Sb) and tellurium (Te) at a temperature wherein tellurium is volatilized and antimony is not volatilized, and performing a sputtering process to form the phase-change material layer including a chalcogenide material on the substrate. Methods of manufacturing a phase-change memory device using the same are also provided. | 09-25-2008 |
In-Sun Park, Suwon-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20080308784 | VARIABLE RESISTANCE NON-VOLATILE MEMORY CELLS AND METHODS OF FABRICATING SAME - Methods of fabricating integrated circuit memory cells and integrated circuit memory cells are disclosed. An integrated circuit memory cell can be fabricated by forming an ohmic layer on an upper surface of a conductive structure and extending away from the structure along at least a portion of a sidewall of an opening in an insulation layer. An electrode layer is formed on the ohmic layer. A variable resistivity material is formed on the insulation layer and electrically connected to the electrode layer. | 12-18-2008 |
| 20090008623 | Methods of fabricating nonvolatile memory device and a nonvolatile memory device - Methods of fabricating a nonvolatile memory device using a resistance material and a nonvolatile memory device are provided. According to example embodiments, a method of fabricating a nonvolatile memory device may include forming at least one semiconductor pattern on a substrate, forming a metal layer on the at least one semiconductor pattern, forming a mixed-phase metal silicide layer, in which at least two phases coexist, by performing at least one heat treatment on the substrate so that the at least one semiconductor pattern may react with the metal layer, and exposing the substrate to an etching gas. | 01-08-2009 |
| 20100243982 | VARIABLE RESISTANCE NON-VOLATILE MEMORY CELLS AND METHODS OF FABRICATING SAME - Methods of fabricating integrated circuit memory cells and integrated circuit memory cells are disclosed. An integrated circuit memory cell can be fabricated by forming an ohmic layer on an upper surface of a conductive structure and extending away from the structure along at least a portion of a sidewall of an opening in an insulation layer. An electrode layer is formed on the ohmic layer. A variable resistivity material is formed on the insulation layer and electrically connected to the electrode layer. | 09-30-2010 |
In-Sun Park, Seoul KR
| Patent application number | Description | Published |
|---|---|---|
| 20090053538 | INTERCONNECTION STRUCTURE HAVING OXYGEN TRAP PATTERN IN SEMICONDUCTOR DEVICE - An interconnection structure having an oxygen trap pattern in a semiconductor device, and a method of fabricating the same are provided. The interconnection structure includes a lower interlayer insulating layer formed on a semiconductor substrate. A metal layer pattern and a capping layer pattern are sequentially stacked on the lower interlayer insulating layer. An oxygen trap pattern is disposed on the capping layer pattern and includes a conductive oxygen trap pattern. | 02-26-2009 |
In-Sun Ryu, Seoul KR
| Patent application number | Description | Published |
|---|---|---|
| 20100295572 | UNIVERSAL TEST SOCKET AND SEMICONDUCTOR PACKAGE TESTING APPARATUS USING THE SAME - A universal test socket includes a housing frame including a side wall, an inner protruding portion protruding inwardly from the side wall, and a through window formed at a center portion of the housing frame, wherein the through window is surrounded by the side wall, a pin plate assembly coupled to the housing frame and including a pin plate in which a plurality of test pins are arranged and a plurality of guide pins formed on periphery of the pin plate, and a package guide portion coupled to the housing frame and located above the pin plate assembly, a semiconductor package to be tested being mounted on the package guide portion. When the pin plate assembly is coupled to the housing frame, the positions of the test pins arranged in the housing frame are varied according to a rotation angle of the pin plate assembly with respect to the housing frame. | 11-25-2010 |
In-Sun Yoo, Paju-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20100141124 | Blue fluorescent compound and organic electroluminescent device using the same - A blue fluorescent compound includes a host material being capable of transporting an electron or a hole; and a dopant material represented by following Formula 1: | 06-10-2010 |