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In Jun
In Jun Choi, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20110187389 | CAPACITANCE MEASURING CIRCUIT FOR TOUCH SENSOR - Disclosed herein is a capacitance measuring circuit for a touch sensor. The capacitance measuring circuit includes a reference voltage generation unit for generating a first reference voltage and a second reference voltage, a MUX unit for selecting one from among electrode voltages, a voltage comparator for comparing a voltage generated by the reference voltage generation unit with the electrode voltage, a charging/discharging circuit unit for performing charging of the input electrode voltage from the first reference voltage to the second reference voltage or performing discharging of the input electrode voltage from the second reference voltage to the first reference voltage, a timer unit for receiving an external control signal, measuring charging time and discharging time of the charging/discharging circuit unit, measuring entire charging time and entire discharging time, and outputting corresponding output signals, and a control unit for receiving an output signal of the voltage comparator and the external control signal, and controlling the charging/discharging circuit unit and the timer unit. | 08-04-2011 |
In Jun Kim, Daejeon-City KR
| Patent application number | Description | Published |
|---|---|---|
| 20090015466 | APPARATUS AND METHOD FOR EXECUTING TELECOMMAND ON GEOSTATIONARY SATELLITE, AND APPARATUS AND METHOD FOR VERIFYING TELECOMMAND EXECUTION STATUS ON GEOSTATIONARY SATELLITE GROUND CONTROL SYSTEM - Provided are an apparatus and method for executing a telecommand on a geostationary satellite, and an apparatus and method for verifying a telecommand execution status on a geostationary satellite ground control system. When a telecommand on a satellite is executed, the satellite generates command execution verification words for the executed telecommand and adds the generated command execution verification words to a telemetry transfer frame, and thus a satellite ground control system can easily verify the telecommand execution. In addition, when telecommand execution result is verified by a satellite ground control system, since an execution result of a time-tag telecommand can be verified without a time delay through command execution verification words provided by a satellite, and a telecommand image DB, a telecommand verifier DB, and a telecommand verifier provided by the satellite ground control system, a series of processes from transmission to verification of a telecommand, in particular a time-tag telecommand, can be automatically processed in real-time without intervention of an operator. | 01-15-2009 |
In Jun Kim, Seoul KR
| Patent application number | Description | Published |
|---|---|---|
| 20080285204 | ELECTROSTATIC CHUCK STRUCTURE FOR SEMICONDUCTOR MANUFACTURING APPARATUS - An electrostatic chuck structure according to example embodiments of the present invention may include at least one specific region of a conductor having a thickness relatively smaller than those of other regions, at least one specific region of a dielectric having a thickness relatively larger than those of other regions, or at least one specific region of a conductor having a thickness relatively smaller than those of other regions and at least one specific region of a dielectric having a thickness relatively larger than those of other regions. Therefore, etching rate and CD uniformity can be improved during a semiconductor manufacturing process. | 11-20-2008 |
In Jun Moon, Chungcheongbuk-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20090289658 | IMPEDANCE CALIBRATION CIRCUIT, SEMICONDUCTOR MEMORY DEVICE WITH THE IMPEDANCE CALIBRATION CIRCUIT AND LAYOUT METHOD OF INTERNAL RESISTANCE IN THE IMPEDANCE CALIBRATION CIRCUIT - An impedance calibration circuit for impedance matching between a semiconductor memory device and an external device includes a driving circuit and a comparing circuit. The driving circuit has a plurality of internal resistances, with one or more of the internal resistances being a variable resistance. The driving circuit compares the impedance of the internal resistances to the input/output impedance of the external device in order to provide a calibration voltage. The comparing circuit compares the calibration voltage to a reference voltage and provides a code signal for calibrating the impedance corresponding to output data with the input/output impedance of the external device. The impedance calibration circuit calibrates an impedance mismatch between the impedance calibration circuit and a data input/output driver by adjusting the impedance of the impedance calibration circuit through the variable resistance. | 11-26-2009 |
| 20110163778 | IMPEDANCE CALIBRATION CIRCUIT, SEMICONDUCTOR MEMORY DEVICE WITH THE IMPEDANCE CALIBRATION CIRCUIT AND LAYOUT METHOD OF INTERNAL RESISTANCE IN THE IMPEDANCE CALIBRATION CIRCUIT - An impedance calibration circuit for impedance matching between a semiconductor memory device and an external device includes a driving circuit and a comparing circuit. The driving circuit has a plurality of internal resistances, with one or more of the internal resistances being a variable resistance. The driving circuit compares the impedance of the internal resistances to the input/output impedance of the external device in order to provide a calibration voltage. The comparing circuit compares the calibration voltage to a reference voltage and provides a code signal for calibrating the impedance corresponding to output data with the input/output impedance of the external device. The impedance calibration circuit calibrates an impedance mismatch between the impedance calibration circuit and a data input/output driver by adjusting the impedance of the impedance calibration circuit through the variable resistance. | 07-07-2011 |
In Jun Park, Daejeon KR
| Patent application number | Description | Published |
|---|---|---|
| 20110319574 | Hexafluoropropylene Oxide Polymer Compositions and a Preparing Method of Hexafluoropropylene Oxide Polymer Using Hexafluoropropylene Oligomer - The present invention relates to hexafluoropropylene oxide polymer composition and a process of preparing of hexafluoropropylene oxide polymer by an anionic polymerization, and in particular the hexafluoropropylene oxide polymer composition comprises an anionic initiator, a polar solvent, hexafluoropropylene and hexafluoropropylene oxide. The hexafluoropropylene oxide polymer is prepared under particular reaction conditions by using the composition, hexafluoropropylene oxide polymer prepared by using the composition according to a preparation process herein has a weight average molecular weight (Mw) of 1,500-4,000 at −10-20° C. | 12-29-2011 |