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Imai, Nara

Akira Imai, Nara JP

Patent application numberDescriptionPublished
20090085830Multiple Video Display Device, Screen Forming Program and Computer Readable Recording Medium - A dual-view liquid crystal display device (04-02-2009
20090303157DISPLAY DEVICE - A display device (12-10-2009
20100091226AUTOMATED TELLER MACHINE - An ATM of the present invention includes a liquid crystal display panel having, between two transparent substrates, (i) an image forming layer including at least a liquid crystal layer and a pixel section in which RGB pixels are arranged in a matrix manner, and (ii) a plurality of barriers (04-15-2010
20100149136DISPLAY DEVICE - In a display device, when a first image is an absolute white image, a direction in which a luminance is maximum is regarded as a main viewing direction for the first image. A luminance Ld in the main viewing direction for the first image in cases where the first image is an absolute black image and other image is an absolute white image, and a luminance Lb in the main viewing direction for the first image in cases where the first image and the other image are absolute black images satisfy a relationship represented by Formula (1):06-17-2010
20100328355DISPLAY DEVICE - A display device is provided with a plurality of cold cathode tubes (light sources) (12-30-2010

Patent applications by Akira Imai, Nara JP

Hirohisa Imai, Nara JP

Patent application numberDescriptionPublished
20100059509MICROWAVE HEATING APPLIANCE - An object of the present invention is to provide a microwave heating appliance capable of achieving a locally concentrated heating in answer to the purpose while achieving a uniform heating in the overall heating chamber in a normal mode. A microwave heating appliance of the present invention includes a microwave generating unit, a waveguide for transmitting a microwave from the microwave generating unit, a heating chamber for housing a heated subject that is heated by the microwave, a rotating antenna for radiating the microwave from the waveguide to the heating chamber, a driving unit for rotating and driving the rotating antenna, a temperature distribution detecting unit for detecting a temperature distribution in the heating chamber, and a controlling unit for controlling a direction of the rotating antenna by controlling the driving unit based on a detected result of the temperature distribution detecting unit, wherein the controlling unit controls a sharp part of radiation directivity of the rotating antenna in a direction decided based on the detected result of the temperature distribution detecting unit to execute a concentrated heating, and the driving unit has a position detecting unit for detecting a position of the rotating antenna.03-11-2010

Shigeki Imai, Nara JP

Patent application numberDescriptionPublished
20100162028VIRTUAL PROCESSOR METHODS AND APPARATUS WITH UNIFIED EVENT NOTIFICATION AND CONSUMER-PRODUCED MEMORY OPERATIONS - The invention provides, in one aspect, a virtual processor that includes one or more virtual processing units. These virtual processing units execute on one or more processors, and each virtual processing unit executes one or more processes or threads (collectively, “threads”). While the threads may be constrained to executing throughout their respective lifetimes on the same virtual processing units, they need not be. An event delivery mechanism associates events with respective threads and notifies those threads when the events occur, regardless of which virtual processing unit and/or processor the threads happen to be executing on at the time. The invention provides, in other aspects, virtual and/or digital data processors with improved dataflow-based synchronization. A process or thread (collectively, again, “thread”) executing within such processor can execute a memory instruction (e.g., an “Empty” or other memory-consumer instruction) that permits the thread to wait on the availability of data generated, e.g., by another thread and to transparently wake up when that other thread makes the data available (e.g., by execution of a “Fill” or other memory-producer instruction).06-24-2010
20100228954GENERAL PURPOSE EMBEDDED PROCESSOR - The invention provides an embedded processor architecture comprising a plurality of virtual processing units that each execute processes or threads (collectively, “threads”). One or more execution units, which are shared by the processing units, execute instructions from the threads. An event delivery mechanism delivers events—such as, by way of non-limiting example, hardware interrupts, software-initiated signaling events (“software events”) and memory events—to respective threads without execution of instructions. Each event can, per aspects of the invention, be processed by the respective thread without execution of instructions outside that thread. The threads need not be constrained to execute on the same respective processing units during the lives of those threads—though, in some embodiments, they can be so constrained. The execution units execute instructions from the threads without needing to know what threads those instructions are from. A pipeline control unit which launches instructions from plural threads for concurrent execution on plural execution units.09-09-2010
20110145626VIRTUAL PROCESSOR METHODS AND APPARATUS WITH UNIFIED EVENT NOTIFICATION AND CONSUMER-PRODUCED MEMORY OPERATIONS - The invention provides, in one aspect, a virtual processor that includes one or more virtual processing units. These virtual processing units execute on one or more processors, and each virtual processing unit executes one or more processes or threads (collectively, “threads”). While the threads may be constrained to executing throughout their respective lifetimes on the same virtual processing units, they need not be. An event delivery mechanism associates events with respective threads and notifies those threads when the events occur, regardless of which virtual processing unit and/or processor the threads happen to be executing on at the time. The invention provides, in other aspects, virtual and/or digital data processors with improved dataflow-based synchronization. A process or thread (collectively, again, “thread”) executing withing such processor can execute a memory instruction (e.g., and “Empty” or other memory-consumer instruction) that permits the thread to wait on the availability of data generated, e.g., by another thread and to transparently wake up when that other thread makes the data available (e.g, by execution of a “Fill” or other memory-producer instruction). 06-16-2011