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Il-Sang

Il-Sang Cho, Seoul KR

Patent application numberDescriptionPublished
200803190122-Pyridyl substituted imidazoles as ALK5 and/or ALK4 inhibitors - 2-pyridyl-substituted imidazoles which are used advantageously in the treatment of diseases mediated by ALK 5 or ALK 4 receptor or both.12-25-2008
200803190222-Pyridyl substituted imidazoles as ALK5 and/or ALK4 inhibitors - 2-pyridyl-substituted imidazoles and their use in inhibiting ALK 5 and/or ALK 4 receptors is disclosed.12-25-2008

Il-Sang Jung, Gyeonggi-Do KR

Patent application numberDescriptionPublished
20080275635Method for recognizing traveling lane and making lane change - Methods and systems for recognizing a vehicle traveling lane and making a lane change are provided. Preferred methods and systems recognize the lane on which a vehicle is traveling and if the vehicle speed of that lane is noticeably slower compared to others, then the vehicle receives an order to move to a faster lane if an open space for changing lanes is available, which can provide more efficient use of the roadway.11-06-2008

Il-Sang Lee, Yongin-City KR

Patent application numberDescriptionPublished
20100141136ORGANIC LIGHT EMITTING DISPLAY - An organic light emitting display includes a substrate; an organic light emitting diode on one surface of the substrate; an encapsulation substrate located opposite and substantially parallel to the substrate with the organic light emitting diode therebetween; a filler layer on one surface of the encapsulation substrate facing the substrate; a first encapsulation layer located between the encapsulation substrate and the substrate and sealing the substrate and the encapsulation substrate together; and a second encapsulation layer located adjacent to the first encapsulation layer and between the encapsulation substrate and the substrate, wherein the filler layer and the second encapsulation layer include a moisture absorbent.06-10-2010

Il-Sang Park, Seoul KR

Patent application numberDescriptionPublished
20100054061Semiconductor memory device having bit test circuit with ignore function - A semiconductor memory device including a bit test circuit with an ignore function is provided. The semiconductor memory device includes a memory cell array and a bit test circuit. The memory cell array includes a plurality of memory cells. The bit test circuit is configured to perform a parallel bit test to determine defective memory cells based on bits received from the plurality of memory cells, a tester signal for each of the plurality of memory cells, and a mode register set signal for each of the plurality of memory cells. The bit test circuit is also configured to output a non-defective pass signal for at least one of the plurality of memory cells based on at least one of the at least one bit received from the at least one memory cell, the tester signal for the at least one memory cell and the mode register set signal for the at least one memory cell.03-04-2010