| Patent application number | Description | Published |
|---|
| 20100078712 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device includes a first semiconductor pillar, a first gate insulating film, a gate electrode, and a first contact. The first semiconductor pillar extends upwardly from a semiconductor substrate. The first gate insulating film covers side surfaces of the first semiconductor pillar. The gate electrode covers the first gate insulating film. The first gate insulating film insulates the gate electrode from the first semiconductor pillar. The first contact partially overlaps, in plane view, the first semiconductor pillar and the gate electrode. The first contact includes a silicon layer having a top level which is higher than a top level of the gate electrode. | 04-01-2010 |
| 20100181615 | SEMICONDUCTOR DEVICE - There is provided a semiconductor device in which an upper main electrode region of a 3D pillar SGT includes a selective epitaxial growth semiconductor film, at least two adjacent 3D pillar SGTs are interconnected in parallel with each other by joining the selective epitaxial growth semiconductor films together, thereby the need for providing an interconnect layer for interconnecting 3D pillar SGTs in parallel with each other is eliminated. | 07-22-2010 |
| 20100295121 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - To provide a semiconductor device including a first silicon pillar, an interlayer dielectric film provided on an upper surface of the first silicon pillar and having a through-hole filled with a conductive material, and a first-diffusion-layer contact plug provided on an upper-side opening of the through-hole. An area of a lower-side opening of the through-hole is equal to an area of the upper surface of the first silicon pillar, and an area of the upper-side opening of the through-hole is larger than the area of the lower-side opening of the through-hole. With this configuration, an area of a contact surface between the conductive material within the through-hole and the first-diffusion-layer contact plug is larger than the area of the upper surface of the first silicon pillar. | 11-25-2010 |
| 20110006360 | SEMICONDUCTOR DEVICE HAVING 3D-PILLAR VERTICAL TRANSISTOR AND MANUFACTURING METHOD THEREOF - A semiconductor device includes: a semiconductor substrate; a silicon pillar having a side surface perpendicular to a main surface of the semiconductor substrate; a gate dielectric film that covers a side surface of the silicon pillar; a gate electrode that has an inner-circumference side surface and an outer-circumference side surface which are perpendicular to the main surface of the semiconductor substrate, and covers a side surface of the silicon pillar such that the inner-circumference side surface and the side surface of the silicon pillar face each other via the gate dielectric film; a gate-electrode protection film that covers at least a part of the outer-circumference side surface of the gate electrode; an interlayer dielectric film provided above the gate electrode and the gate-electrode protection film; and a gate contact plug that is embedded in a contact hole provided on the interlayer dielectric film and is in contact with the gate electrode and the gate-electrode protection film. | 01-13-2011 |
