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| 20080199799 | Electrostatic image developer, process cartridge, and image forming apparatus - An electrostatic image developer contains a toner and a carrier having a resin coating layer formed on the surface of a core material containing a ferrite component, wherein a ratio R1/R2 is from 0.88 to 0.92 where R1 is the resistance value (Ω) of the developer having a toner concentration of 2 mass % in a state formed into a magnetic brush, at an applied voltage of 10 | 08-21-2008 |
| 20090061333 | CARRIER FOR ELECTROSTATIC LATENT IMAGE DEVELOPMENT, AND DEVELOPER FOR ELECTROSTATIC LATENT IMAGE DEVELOPMENT, METHOD OF FORMING AN IMAGE, DEVELOPER CARTRIDGE FOR ELECTROSTATIC LATENT IMAGE DEVELOPMENT, PROCESS CARTRIDGE AND IMAGE FORMING APPARATUS USING THE SAME - A carrier for developing an electrostatic latent image includes carrier particles, and the carrier particles include magnetic particles and a coating layer coating the surfaces of the magnetic particles. The BET specific surface area of the magnetic particles is 0.1300 m | 03-05-2009 |
| 20090109448 | ELECTROSTATIC CHARGE IMAGE DEVELOPING CARRIER, ELECTROSTATIC CHARGE IMAGE DEVELOPER, ELECTROSTATIC CHARGE IMAGE DEVELOPER CARTRIDGE, PROCESS CARTRIDGE, IMAGE FORMING METHOD AND IMAGE FORMING APPARATUS - An electrostatic charge image developing carrier includes: a magnetic particle; and a resin coating layer that covers a surface of the magnetic particle with a resin, the resin coating layer containing an acid having a cyclic diterpene structure and either of carbon black or nigrosine dispersed therein. | 04-30-2009 |
| 20090111042 | ELECTROSTATIC CHARGE IMAGE DEVELOPER, PROCESS CARTRIDGE AND IMAGE FORMING APPARATUS - An electrostatic charge image developer includes a toner containing an external additive and a carrier comprising a resin-coated layer formed on a surface of a core material. The average shape factor SF1 of the toner is from 125 to 135, the number of particles having shape factor SF1 of less than 125 is from 5% to 30% by number with respect to the total number of toner particles, the number of particles having shape factor SF1 of greater than 135 is from 5% to 30% by number with respect to the total number of toner particles, the scratch line width in a scratch strength test of the resin used in the resin-coated layer is from 80 μm to 200 μm, and the scratch depth is from 60 μm to 150 μm. | 04-30-2009 |
| 20100330492 | CARRIER FOR ELECTROSTATIC DEVELOPMENT, DEVELOPER FOR ELECTROSTATIC DEVELOPMENT, DEVELOPER CARTRIDGE FOR ELECTROSTATIC DEVELOPMENT, PROCESS CARTRIDGE AND IMAGE FORMING APPARATUS - The invention provides a carrier for electrostatic development, including ferrite particles and a coating layer including a resin having a cycloalkyl group, the ferrite particles including strontium in an amount of from about 0.1% by weight to about 1.0% by weight and having a BET specific surface area of from about 0.13 m | 12-30-2010 |
| 20110020747 | ELECTROPHOTOGRAPHIC CARRIER, ELECTROPHOTOGRAPHIC DEVELOPER, PROCESS CARTRIDGE AND IMAGE FORMING DEVICE - An electrophotographic carrier includes a magnetic core material and a resin layer that coats the magnetic core material, the resin layer comprising a resistance control agent and a polymer including a repeating unit derived from an alicyclic group-containing methacrylic ester, the resin layer including a monomer as a base material of the repeating unit in the polymer in an amount of from about 0.5% by weight to about 3.0% by weight relative to the total amount of the resin layer. | 01-27-2011 |
| 20110045399 | ELECTROSTATIC IMAGE DEVELOPING CARRIER, ELECTROSTATIC IMAGE DEVELOPER, PROCESS CARTRIDGE, IMAGE FORMING METHOD AND IMAGE FORMING APPARATUS - An electrostatic image developing carrier includes a ferrite particle and a resin layer that coats the ferrite particle, wherein a magnesium element content of the ferrite particle is from about 3.0% by weight to about 20.0% by weight; wherein a manganese element content of the ferrite particle is from about 0.2% by weight to about 0.8% by weight; and wherein a content of toluene is more than about 100 ppm and not more than about 2,000 ppm. | 02-24-2011 |
| 20110236814 | CARRIER FOR DEVELOPING ELECTROSTATIC CHARGE IMAGE, DEVELOPER FOR ELECTROSTATIC CHARGE IMAGE, PROCESS CARTRIDGE AND IMAGE FORMING APPARATUS - A carrier for developing an electrostatic charge image, including a core, and a coating layer including a resin and inorganic oxide particles that exhibit electroconductivity, by which the core is coated, wherein the inorganic oxide particles have, when they are aggregated, an aggregation size of or when they are not aggregated, a primary particle size of, from 230 nm to 970 nm. | 09-29-2011 |
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| 20080222204 | Data Processing Apparatus, Data Processing Method, and Computer Program - A data processing apparatus includes an input section configured to receive data to be encoded, a first pseudo-random-number generating section configured to generate a first pseudo-random number, a second pseudo-random-number generating section configured to a second pseudo-random number, an address determining section configured to determine matrix address candidate values on the basis of a bit string of the second pseudo-random number generated by the second pseudo-random-number generating section, a matrix generating section configured to generate a matrix in which pixel values based on constituent bit values of the first pseudo-random number generated by the first pseudo-random-number generating section are set at matrix positions designated on the basis of the matrix address candidate values, and an encoding section configured to generate encoded data by executing exclusive OR operations between corresponding positional data in the matrix generated by the matrix generating section and the received data. | 09-11-2008 |
| 20080232713 | Image Matching Method, Image Matching Apparatus, and Program - To provide an image matching method, an image matching apparatus, and a program able to perform a matching images at a high accuracy. A Hough transform unit | 09-25-2008 |
| 20090169116 | COMPARISON METHOD, COMPARISON SYSTEM, COMPUTER, AND PROGRAM - A comparison apparatus | 07-02-2009 |
| 20100040265 | REGISTRATION DEVICE, VERIFICATION DEVICE, AUTHENTICATION METHOD AND AUTHENTICATION PROGRAM - A registration device, verification device, authentication method and authentication program that can improve the accuracy of authentication are proposed. A predetermined process is performed for an image signal obtained as a result of taking a picture of a image-capturing target which is given as an object for biometrics authentication and which is a predetermined part of a living body; a characteristic part of the image-capturing target is extracted from the image signal; the Hough transform is carried out by characteristic extraction means for the extracted characteristic part; a plurality of characteristic parameter points are extracted from a parameter point obtained as a result of the Hough transform under a predetermined extraction condition; and a determination is made as to whether the plurality of characteristic parameter points are those to be registered or to be compared with the registered one according to an angle component of the plurality of the characteristic parameter points. | 02-18-2010 |
| 20100158342 | Image matching method, program, and image matching system - An image matching method capable of matching images with a high precision and a program and an image matching system for the same, providing a conversion unit for performing image processing based on a registered image and a match image for converting points in each image to patterns of curves based on a distance from a reference position to the closest point on a straight line passing through each point in the image from the reference position and an angle formed by a straight line passing through the reference position and the closest point and an x-axis as a reference axis including the reference position, converting linear components in the images to patterns of a plurality of overlapped curves, and generating converted images, a correlation value generation unit for performing correlation processing based on the converted images and generating a correlation value, and a matching unit for performing the matching based on a signal indicating the correlation value generated by the correlation value generation unit. | 06-24-2010 |
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| 20080217553 | FOCUSING METHOD OF CHARGED PARTICLE BEAM AND ASTIGMATISM ADJUSTING METHOD OF CHARGED PARTICLE - A focusing method of a charged particle beam includes measuring a first set value to focus a beam on a position of a reference plane by using a lens coil, acquiring a first factor to change a set value of an electrostatic lens depending on a distance and a second factor to change a set value of the coil depending on a distance, measuring a level distribution of a target plane, correcting the first set value by using the second factor to correct a focal point position of the beam in the coil from the position of the reference plane to an intermediate level position of the level distribution of the target plane, and correcting a second set value of the lens depending on a level position of the target plane by using the first factor to correct a focal point position of the beam by the lens. | 09-11-2008 |
| 20090314950 | LITHOGRAPHY APPARATUS AND FOCUSING METHOD FOR CHARGED PARTICLE BEAM - A lithography apparatus includes a unit irradiating a charged particle beam; first and second aperture plate members configured to shape the beam; first and second coils configured to be arranged between the unit and the first aperture plate member, to temporarily deflect the beam, to change a direction of the beam after the temporarily deflecting, and to deflect the beam to a position where the beam passes through the first aperture plate member by the changing; a lens configured to be arranged between the first and second aperture plate members and to control a focal position of the beam having passed through the first aperture plate member; and a unit configured to calculate a difference between positions of the beam on the second aperture plate member obtained by different sets of amounts of deflection at a same focal position when a combination of one of focal positions of the beam controlled by the lens and one of sets of amounts of deflection of the beam obtained by the first and second coils is changed. | 12-24-2009 |
| 20100001203 | METHOD OF ACQUIRING OFFSET DEFLECTION AMOUNT FOR SHAPED BEAM AND LITHOGRAPHY APPARATUS - A method of acquiring an offset deflection amount for a shaped beam, includes forming reference images of first and second figures which can be shaped by first and second aperture plates placed on a lithography apparatus; forming, using design data of a mark, a reference image of the mark; forming a first convolution reference image obtained by a convolution calculation of the reference image of the mark and the reference image of the first figure and a second convolution reference image obtained by a convolution calculation of the reference image of the mark and the reference image of the second figure; respectively scanning over the mark with charged particle beams having shaped into the first and second figures by using the first and second aperture plates to acquire optical images of the first and second figures; forming a first convolution synthesis image obtained by a convolution calculation of the first convolution reference image and the optical image of the first figure and a second convolution synthesis image obtained by a convolution calculation of the second convolution reference image and the optical image of the second figure; calculating center-of-gravity positions of the first and second convolution synthesis images; and calculating an offset deflection amount for the charged particle beam having shaped into the second figure to match reference positions of the first and second figures based on the center-of-gravity positions of the first and second convolution synthesis images to output a result calculated. | 01-07-2010 |
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| 20100188116 | IMPEDANCE ADJUSTING CIRCUIT - An impedance adjusting circuit that includes an external terminal to which an external resistor is connected, a first transistor array of a first conductivity type that is connected in parallel between the external terminal and a first power supply terminal and changes a voltage of the external terminal by adjusting an impedance in response to a first control signal, a second transistor array of a second conductivity type that is connected in parallel between the external terminal and a second power supply terminal and changes the voltage of the external terminal by adjusting the impedance in response to a second control signal, and a control circuit that specifies the first control signal according to a comparison result between the voltage of the external terminal and a reference voltage and specifies the second control signal in a different period from a period to specify the first control signal. | 07-29-2010 |
| 20110057720 | SEMICONDUCTOR INTEGRATED CIRCUIT - Provided is a semiconductor integrated circuit according to an exemplary aspect of the present invention including first and second transmitter-receivers that execute transmission and reception of data through a signal line. The first transmitter-receiver includes a first termination circuit that includes a first resistor and a first switch, the first resistor being provided between a first power supply terminal and the signal line, the first switch controlling a current flowing through the first resistor to be turned on and off, and a control circuit that outputs a first control signal to the first termination circuit so that the first switch is turned on when the first transmitter-receiver receives data, the first switch is turned off when the first transmitter-receiver transmits the data, and the first switch is continuously on during a first predetermined period after receiving the data when the first transmitter-receiver further receives another data after receiving the data. | 03-10-2011 |
| 20110057721 | SEMICONDUCTOR INTEGRATED CIRCUIT - Provided is a semiconductor integrated circuit according to an exemplary aspect of the present invention including a data transmitting circuit and a data receiving circuit that receives data transmitted from the data transmitting circuit. The data transmitting circuit includes a data output circuit that outputs the data or sets an output to a high impedance state, and a control circuit that outputs a control signal to the data output circuit so that the data output circuit outputs the data when the data transmitting circuit transmits the data, and the data output circuit keeps outputting data last output in the previous data transmission, during a predetermined period after the previous data transmission when the data transmitting circuit further transmits another data after transmitting the data. | 03-10-2011 |
| 20110057722 | SEMICONDUCTOR INTEGRATED CIRCUIT - Provided is a semiconductor integrated circuit according to an exemplary aspect of the present invention including a data transmitting circuit that transmits data in parallel through a plurality of signal lines and a data receiving circuit that receives the data. The data transmitting circuit includes a plurality of data output circuits that output the data in a data transmission mode or set an output to a high impedance state in a HiZ mode, a plurality of data selection circuits that select one of the data and fixed data and output the selected data to the data output circuits, and a control circuit that controls the data output circuits to output the fixed data during a period between a time when a mode is switched from the HiZ mode to the data transmission mode and a time when the data output circuits start to output the data. | 03-10-2011 |
| 20110255354 | SEMICONDUCTOR INTEGRATED CIRCUIT - Provided is a semiconductor integrated circuit according to an exemplary aspect of the present invention including a data transmitting circuit that transmits data in parallel through a plurality of signal lines and a data receiving circuit that receives the data. The data transmitting circuit includes a plurality of data output circuits that output the data in a data transmission mode or set an output to a high impedance state in a HiZ mode, a plurality of data selection circuits that select one of the data and fixed data and output the selected data to the data output circuits, and a control circuit that controls the data output circuits to output the fixed data during a period between a time when a mode is switched from the HiZ mode to the data transmission mode and a time when the data output circuits start to output the data. | 10-20-2011 |
| 20120026812 | MEMORY WITH TERMINATION CIRCUIT - Provided is a semiconductor integrated circuit according to an exemplary aspect of the present invention including first and second transmitter-receivers that execute transmission and reception of data through a signal line. The first transmitter-receiver includes a first termination circuit that includes a first resistor and a first switch, the first resistor being provided between a first power supply terminal and the signal line, the first switch controlling a current flowing through the first resistor to be turned on and off, and a control circuit that outputs a first control signal to the first termination circuit so that the first switch is turned on when the first transmitter-receiver receives data, the first switch is turned off when the first transmitter-receiver transmits the data, and the first switch is continuously on during a first predetermined period after receiving the data when the first transmitter-receiver further receives another data after receiving the data. | 02-02-2012 |
