| Patent application number | Description | Published |
| 20110109262 | WIRELESS ENERGY TRANSFER ANTENNAS AND ENERGY CHARGING SYSTEMS - A resonant wireless energy transfer system comprises first and second antennas made up of dual parallel wire helixes wherein the wires are terminated by short wires. Voltage controlled variable capacitors are connected into the antennas to permit progressive variation between folded dipole and normal dipole operating modes such that optimum energy transfer can be achieved between the antennas over a wide range of antenna separation distances. A vehicle battery charging system using the above-described antennas is provided including an installation which allows purchase of battery charging power by members of the general public. In-vehicle energy transfer for sensors, computers, cell phones and the like is also described. | 05-12-2011 |
| 20110139234 | GRATING STRUCTURE FOR DIVIDING LIGHT - A grating structure and a solar cell assembly. In one aspect, the grating structure suppresses the zero order transmission to near 0%. In another aspect, the solar cell assembly has improved absorption due to coupling with a grating structure. | 06-16-2011 |
| 20110181956 | OPTICAL DEVICE USING DIFFRACTION GRATINGS - A double-sided grating divider acts as a light switch where the upper and lower grating dividers are arranged to accommodate a relative lateral shift therebetween of about one-fourth of the period of the diffraction grating elements and where the critical refraction angles of the grating dividers are more than about 43.6°. Lateral shift may be achieved by various devices including MEMS and metal couplers having a known/calibrated thermal coefficient of expansion over a temperature range of interest. | 07-28-2011 |
| 20110181957 | OPTICAL LIGHT SWITCH USING DOUBLE-SIDED DIFFRACTION STRUCTURE - A light switch (or valve) made up of two mutually inverted, substantially identical diffraction gratings with a liquid medium therebetween, arranged to allow the grating substrates to be shifted laterally relative to one another so as to align and mis-align the grating elements. When aligned, incident-polarized light passes through the switch and when misaligned, light does not pass through the switch but is reflected. | 07-28-2011 |
| 20110205617 | REFLECTION-MINIMIZED PHOTONIC CRYSTAL AND DEVICE UTILIZING SAME - A photonic crystal structure that is composed of a host media having periodic dielectric holes disposed in the media at a period of a | 08-25-2011 |
| 20120006404 | SOLAR CELL ASSEMBLY WITH DIFFRACTION GRATINGS - A solar cell structure using either a dye-sensitized or organic absorber is provided with a diffraction grating on at least one side to enhance the travel of first order diffraction components through the photo sensitive material. A two-sided cell uses diffraction gratings both top and bottom wherein the periodic diffraction elements of one grating are shifted by one-quarter of the grating period relative to the other. | 01-12-2012 |
| 20120038987 | OPTICAL DEVICE USING DOUBLE-GROOVE GRATING - Optical devices using double-groove diffraction gratings having periodic sets of TiO | 02-16-2012 |
| 20120075703 | OPTICAL DEVICE USING LATERALLY-SHIFTABLE DIFFRACTION GRATINGS - A double-sided grating divider acts as a light switch where the upper and lower grating dividers are arranged to accommodate a relative lateral shift therebetween of about one-fourth of the period of the diffraction grating elements and where the critical refraction angles of the grating dividers are more than about 43.6°. Lateral shift may be achieved by various devices including MEMS and metal couplers having a known/calibrated thermal coefficient of expansion over a temperature range of interest. | 03-29-2012 |
| Patent application number | Description | Published |
| 20110121903 | POWER AMPLIFIER - There is provided a power amplifier that can increase power efficiency by preventing power consumption caused by DC components from an RF input signal. A power amplifier according to an aspect of the invention may include: an inverter amplification section amplifying an input signal according to an inverter method to thereby remove DC components from the input signal; an impedance matching section matching an impedance of a transmission path of the input signal amplified by the inverter amplification section; and an amplification section amplifying an impedance-matched signal from the impedance matching section according to a gain set beforehand. | 05-26-2011 |
| 20110140756 | ANALOG CIRCUIT HAVING IMPROVED RESPONSE TIME - There is provided an analog circuit having improved response time. An analog circuit having improved response time may include: a low level limiter converting a signal having a lower level than a predetermined reference level into a signal having a predetermined non-low level higher than the predetermined reference level; and an analog circuit section amplifying the signal from the low level limiter into a signal having a predetermined level. | 06-16-2011 |
| 20110140781 | IMPEDANCE MATCHING CIRCUIT ELIMINATING INTERFERENCE BETWEEN SIGNAL LINES AND POWER AMPLIFIER HAVING THE SAME - Disclosed are an impedance matching circuit preventing the occurrence of inter-line interference by making currents at adjacent lines flow in the same direction, and a power amplifier having the same. The impedance matching circuit eliminating interference between signal lines includes: a first transformer including a first input line which forms a first loop by a conductor receiving a signal and a first output line which forms a second loop by a conductor outputting a signal at the inner side of the first loop of the first input line to match the impedance of a path of an input signal; and a second transformer including a second input line which forms a third loop by a conductor receiving a signal and a second output line which forms a fourth loop by a conductor outputting a signal at the inner side of the third loop of the second input line to match impedance, wherein the direction of current in the first input line of the first transformer and the direction of current in the second input line of the second transformer are the opposite so that a portion of the first input line of the first transformer and a portion of the second input line of the second transformer adjacent to the portion of the first input line of the first transformer have the same current direction. | 06-16-2011 |
| 20110156677 | LOW-DROPOUT REGULATOR - There is provided a low-dropout regulator capable of preventing transistors from operating in a triode or deep triode region. A low-dropout regulator according to an aspect of the invention may include: a first operational amplifier having a first input receiving an input voltage; a first P-channel MOSFET having a gate connected to an output of the first operational amplifier, a source connected to a power source terminal, and a drain connected to an output terminal; a feedback circuit providing at least portion of a voltage of the output terminal as a feedback to a second input of the first operational amplifier; and a triode limiter circuit receiving voltages at the source and the gate of the first P-channel MOSFET comparing a voltage difference therebetween with a predetermined reference voltage, and increasing a voltage of the second input of the first operational amplifier when the voltage difference is substantially the same as the reference voltage to thereby prevent the first P-channel MOSFET from entering a triode mode or a deep triode mode. | 06-30-2011 |
| Patent application number | Description | Published |
| 20080309411 | RADIO FREQUENCY SIGNAL AMPLIFYING DEVICE - There is provided a radio frequency (RF) signal amplifying device consuming less power and operable at a high voltage in a PA driving amplifying apparatus applicable to a PA amplifying circuit which amplifies power of an RF signal. The RF signal amplifying device includes: a balun converting an unbalanced radio frequency signal into a balanced radio frequency signal; a primary amplifier differentially amplifying the balanced radio frequency signal from the balun; and at least one secondary amplifier secondarily and differentially amplifying the balanced radio frequency signal amplified from the primary amplifier. | 12-18-2008 |
| 20090085705 | TRANSFORMER - A transformer including: a multilayer board; one or more input conductive lines formed on the multilayer board, whose both ends connected to input terminals of a positive signal and a negative signal, respectively; one output conductive line formed adjacent to the one or more input conductive lines to form an electromagnetic coupling with the one or more input conductive lines, whose one end is connected to an output terminal and another end is connected to a ground; a power supply pad formed in an area of the one or more input conductive lines; and a harmonics remover formed between the one end and the another end of the output conductive line to remove harmonics components of a signal outputted from the output conductive line, wherein a part of the one or more input conductive lines is formed on a top surface of the multilayer board and rest of the one or more input conductive lines is formed on a different layer from the top surface of the multilayer board, which are connected to each other via a via hole, and a portion of the output conductive line is formed on the top surface of the multilayer board and another portion of the output conductive line is formed on the different layer from the top surface of the multilayer board, which are connected to each other via the via hole, not to be directly connected to the one or more input conductive lines. | 04-02-2009 |
| 20090309661 | Systems and Methods for Switching Mode Power Amplifier Control - Embodiments of the invention may provide for enhancement systems and methods for a power amplifier output control system. In an example embodiment, driver amplifier control may be provided in conjunction with power amplifier control to improve the power efficiency and/or dynamic range of the transmitter system. Furthermore, control over the driver amplifier may allow for relaxed power control slope, which may lessens the burden of digital to analog converters (DACs) in transmitter systems such as cellular transmitter systems. Also, systems and methods in accordance with example embodiments of the invention may provide a less sensitive solution to operational environment variations such as temperature, battery power voltage and implementation IC process. | 12-17-2009 |
| 20090309662 | Systems and Methods for Power Amplifier with Integrated Passive Device - Embodiments of the invention may provide for systems and methods for providing a power amplifier with integrated passive device, thereby improving the performance of the power amplifier. The power amplifier may include a signal amplification section, a power combining section, and a coupling device section that interconnects the signal amplification section and the power combining section. The signal amplification section may be implemented on a first substrate, and the power combining section may be implemented on a second substrate, where the first substrate and the second substrate may be different. The power combining section may be implemented by the integrated passive device (IPD) that may have characteristics of high performance passive device with flexibility of implementing diverse functions, including a notch filter, a low pass filter, and/or bypass capacitance for bias network. The power combining section implemented by the integrated passive device may have an improved power combining efficiency. | 12-17-2009 |
| 20100093292 | Tx MODULE FOR WIRELESS COMMUNICATION - A Tx module for wireless communications includes a plurality of Tx signal input ports receiving Tx signals of different frequencies, respectively, a plurality of power amplification units having input ports connected to the plurality of Tx signal input ports, respectively, a plurality of matching circuit units configured as transformers having input ports connected to output ports of the plurality of power amplification units, respectively, a plurality of harmonic filter units having input ports connected to output ports of the plurality of matching circuit units, respectively, a switch unit having input ports connected to output ports of the plurality of harmonic filter units, respectively and selecting one of signals input through the input ports as output, a gain/switching control unit controlling gains of the power amplification units and controlling the output selection of the switch unit, and a Tx signal output port connected to an output port of the switch unit. | 04-15-2010 |
| 20110140682 | VOLTAGE REGULATOR SUITABLE FOR CMOS CIRCUIT - There is provided a voltage regulator suitable for a CMOS circuit. A voltage regulator suitable for a CMOS circuit according to an aspect of the invention may include: a voltage setting unit setting a voltage across both terminals of a load; a voltage amplification unit setting an input voltage; and a voltage control unit controlling a voltage to be applied to the second connection node according to an output voltage of the voltage amplification unit, wherein the voltage across both terminals of the load is maintained to be constant regardless of variations in a power voltage. | 06-16-2011 |
| 20110193545 | POWER CONTROL SYSTEM AND POWER AMPLIFICATION SYSTEM USING THE SAME - There is provided a power control system. A power control system may include: a power regulator having a plurality of power PMOS transistors connected to a power source in parallel with each other; a current sensing unit connected to the power source and sensing currents flowing through a plurality of target PMOS transistors located at predetermined positions; a current mirror unit connected to a first regulated voltage terminal and generating a plurality of currents equal to the currents sensed by the current sensing unit; a comparator unit totaling the plurality of currents generated by the current mirror unit to convert the totaled currents into a voltage, and generating a voltage difference between the voltage and a predetermined reference voltage; and a current bias circuit unit controlling a bias current according to the voltage difference from the comparator unit. | 08-11-2011 |
| Patent application number | Description | Published |
| 20120011421 | FAIL ANALYSIS SYSTEM AND METHOD FOR SEMICONDUCTOR DEVICE - According to one embodiment, a fail analysis system performs mesh division of a physical fail bit map and stores fail bit map image data of a part bit fail region in a first image data storage region while classifying the fail bit map image data in each contraction ratio, in each chip, and in each layer. The fail analysis system also stores the fail bit map image data in a second image data storage region while classifying the fail bit map image data in each kind of a fail mode, in each contraction ratio, in each chip, and in each layer. Further, based on an instruction of a display format and/or a display region from a user, the fail analysis system extracts the pieces of fail bit map image data from the first image data storage region or second image data storage region to combine the pieces of fail bit map image data, and displays the combined fail bit map image data on a display unit. | 01-12-2012 |
| 20120036405 | FAILURE ANALYZING DEVICE AND FAILURE ANALYZING METHOD - According to one embodiment, a failure analyzing device includes a classifying unit that classifies a failure type in a fail bit map corresponding to each layer, a storage unit that stores a rule to combine failed cells of different layers, and a determining unit that groups a classification result matched with the rule among classification results based on the classifying unit. The rule includes a base point failure, an association failure becoming a combination object of the base point failure, a combination condition defining a relationship between the base point failure and the association failure, and a combination failure name. The determining unit extracts the base point failure from the classification result of one layer, extracts the association failure matched with the combination condition from the classification results of the other layers, groups the extracted base point failure and association failure, and provides the combination failure name. | 02-09-2012 |