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Hyung-Seok

Hyung Seok Choi, Daejeon KR

Patent application numberDescriptionPublished
20080220490Method for Improving Organisms Using Flux Scanning Based on Enforced Objective Flux - The present invention relates to a method for improving useful substance-producing organisms using metabolic flux analysis, and more particularly to a method for improving a host organism producing a useful substance, the method comprising: calculating a maximum flux value corresponding to the theoretical maximum yield of the useful substance in the metabolic network model of the host organism for producing useful substance, and calculating the optimum value of metabolic flux associated with useful substance production in the metabolic network when the value of cell growth-associated metabolic flux is the maximum under the condition where fermentation data are applied or not applied; selecting metabolic fluxes whose absolute values increase from the range between the maximum value and the optimum value; screening genes associated with the selected metabolic fluxes; and introducing and/or amplifying the selected genes in the host organism. According to the invention, the production of the useful substance can be effectively improved by selecting metabolic fluxes to be amplified and genes involved in the metabolic fluxes from the range between the optimum value and maximum value of production-associated metabolic flux in the host organism for producing the useful substance, whose genome-level metabolic network model is constructed, and introducing and/or amplifying the selected genes in the organism.09-11-2008
20090298070METHOD FOR ANALYZING METABOLITES FLUX USING CONVERGING RATIO DETERMINANT AND SPLIT RATIO DETERMINANT - The present invention relates to a method for analyzing metabolic flux using CRD and SRD. Specifically, the method comprising: selecting a specific target organism, constructing the metabolic network model of the selected organism, identifying the correlations between specific metabolic fluxes in the metabolic network model, defining the correlation ratios as CRD and SRD, determining the correlation ratios of the metabolic fluxes through the experiment for measuring metabolic flux ratios, modifying a stoichiometric matrix with the determined CRD, SRD and correlation ratios, and applying the modified stoichiometric matrix of the metabolic network model for linear programming. According to the inventice method, the correlation between influent/effluent metabolic fluxes with respect to specific metabolites in target organisms (including 12-03-2009

Hyung Seok Kim, Gwangju KR

Patent application numberDescriptionPublished
20120128594SELECTIVE INFARCTED-TISSUE-TARGETING BACTERIA AND USE THEREOF - The present invention relates to bacteria which specifically target infracted tissue and use thereof. The present invention provides a selective infracted tissue-targeting bacterium for the first time, and can be used in selectively delivering drugs to the infracted tissue or in selectively imaging the infracted tissue. The infracted tissue-targeting bacterium of the present invention can finish treatments by using antibiotics, and therefore, have remarkable advantages as compared to gene therapy using recombinant viruses. The infracted tissue-targeting bacterium of the present invention have a significantly high affinity and specificity to infracted myocardium or infracted brain, thereby significantly reducing undesired transfections in the organs or tissues other than the heart. The gene expression by the infracted tissue-targeting bacterium of the present invention in infracted myocardium or infracted brain is remotely controllable.05-24-2012

Hyung Seok Kim, Guui 1-Dong KR

Patent application numberDescriptionPublished
20120038590TABLETOP INTERFACE SYSTEM AND METHOD THEREOF - Provided is a tabletop interface system. A tabletop input device diffuses an infrared light emitted based on at least one touch input from a user. A tabletop output device allows the diffused infrared light to pass therethrough to display content information corresponding to at least one touch point. The tabletop recognition device recognizes the at least one touch point by generating a touch image data based on the infrared light passing through the tabletop output device and generates touch point information by using the touch image data. The content server transmits the content information, which corresponds to the touch point information received from the tabletop recognition device, to at least one content client application.02-16-2012

Hyung Seok Lee, Suwon-Si KR

Patent application numberDescriptionPublished
20080198567MULTILAYER PRINTED CIRCUIT BOARD - Disclosed is a multilayer printed circuit board. The multilayer printed circuit board includes a power source surface to provide power to each component disposed on the power source surface, a ground surface having a reference voltage, a strip line which passes through the power source surface and/or the ground surface so as to transmit signals between components, an antenna installed in proximity to a sectional region of the power source surface and the ground surface, and an electromagnetic wave reduction member which is provided between the power source surface and the ground surface to effectively reduce an electromagnetic wave generated from the strip line.08-21-2008

Hyung Seok Park, Gangseo-Gu KR

Patent application numberDescriptionPublished
20100066650Liquid crystal display device including touch panel - A liquid crystal display device in which a touch panel is embedded in a liquid crystal panel, which reduces the number of processes and eases assembly. The liquid crystal display device includes first and second substrates opposite each other, a thin film transistor array formed on the first substrate, a touch sensing part formed on the second substrate including a plurality of transparent X electrodes, a plurality of transparent Y electrodes orthogonally intersecting each other and a first transparent insulating film between the X electrodes and the Y electrodes, a color filter array formed on the touch sensing part, and a liquid crystal layer formed between the thin film transistor array and the color filter array.03-18-2010
20100066702Liquid crystal display device and method of manufacturing thereof - A liquid crystal display device includes: a liquid crystal panel including first and second substrates facing each other and a liquid crystal layer between the first and second substrates, each of the first and second substrates defining a central display region and a peripheral non-display region; a cover glass integrated touch sensor on the liquid crystal panel, the touch sensor including a plurality of transparent first electrodes and second electrodes formed on a surface of the cover glass facing the liquid crystal panel, wherein the first electrodes and second electrodes cross each other; and a touch signal applicator at a side of the cover glass away from the display region of the liquid crystal panel.03-18-2010
20120105350LIQUID CRYSTAL DISPLAY DEVICE AND METHOD OF MANUFACTURING THEREOF - A liquid crystal display device includes: a liquid crystal panel including first and second substrates facing each other and a liquid crystal layer between the first and second substrates, each of the first and second substrates defining a central display region and a peripheral non-display regions; a cover glass integrated touch sensor on the liquid crystal panel, the touch sensor including a plurality of transparent first electrodes and second electrodes formed on a surface of the cover glass facing the liquid crystal panel, wherein the first electrodes and second electrodes cross each other; and a touch signal applicator at a side of the cover glass away from the display region of the liquid crystal panel.05-03-2012

Hyung Seok Yoon, Gyeonggi-Do KR

Patent application numberDescriptionPublished
20120090546SOURCE SUPPLYING UNIT, METHOD FOR SUPPLYING SOURCE, AND THIN FILM DEPOSITING APPARATUS - Provided are a source supplying unit and a method for supplying a source. The source supplying unit includes a pot configured to store a source material, an injector communicating with the pot to inject the source material evaporated from the pot, a high frequency coil part surrounding an outside of the pot, and a resistance-type heating part disposed at an outside of the injector. Since a high frequency induction heating method and a resistance-type heating method are combined to evaporate a source material to be supplied, a large amount of source material can be used, and the thickness and quality of a thin film can be easily controlled.04-19-2012

Hyung-Seok Choi, Yongin-Si KR

Patent application numberDescriptionPublished
20090053034Method of controlling pressure in a wafer transfer system - A wafer transfer system, and method of controlling pressure in the system, includes a loadport for receiving a wafer container, a housing operably connected to the loadport, a wafer transfer mechanism for transferring a wafer between the wafer container and the housing, a wafer container sensor for detecting a presence of the wafer container on the loadport, a variable speed fan disposed in a first portion of the housing, a variable exhaust unit disposed in a second portion of the housing facing the first portion, the variable exhaust unit being capable of varying an exhaust rate of air from the housing, and a controller for variably operating the variable speed fan and the variable exhaust unit in response to a signal from the wafer container sensor.02-26-2009

Patent applications by Hyung-Seok Choi, Yongin-Si KR

Hyung-Seok Choi, Gyeonggi-Do KR

Patent application numberDescriptionPublished
20080196515CONTAMINATION ANALYSIS UNIT AND METHOD THEREOF, AND RETICLE CLEANING SYSTEM - A contamination analysis unit and method for inspecting pollutants remaining on a target side of an inspection object such as a reticle after cleaning the object is provided. After steeping the target side in a solution, a sampling liquid may be abstracted therefrom after a predetermined time and may be analyzed.08-21-2008
20090025565AIR FILTERING DEVICE AND CLEANING SYSTEM OF SEMICONDUCTOR MANUFACTURING APPARATUS WITH THE SAME - An air filtering device and an air cleaning system of a semiconductor manufacturing apparatus to reduce cost and increase manufacturing productivity. The air filtering device may include a frame having an open aperture coupled to an air supply line. A buffer frame configured to be inserted into the frame may include a plurality of slot parts, each slot part having a plurality of air in/out apertures through which air may flow in or out from the buffer frame. A plurality of filters may be releasably fastened to the plurality of slot parts to filter pollution material contained in air flowing through the air in/out apertures. An air interrupter for interrupting air flowing through the air in/out apertures may be used when replacing the plurality of filters, thereby providing purified air to the semiconductor manufacturing apparatus during the replacement.01-29-2009

Hyung-Seok Chung, Daejeon-Si KR

Patent application numberDescriptionPublished
20090129282Method and apparatus for measuring quality of VoIP call - Provided are a method and an apparatus for periodically measuring speech quality in a voice over Internet protocol (VoIP) terminal while a VoIP call between VoIP terminals is in progress. The method comprises: receiving summary information regarding traffic sent from an opposite VoIP terminal; and evaluating speech quality by comparing the summary information with actually received information regarding the traffic sent from the opposite VoIP. Accordingly, each VoIP terminal can precisely evaluate the speech quality periodically and send the evaluation result to each other.05-21-2009
20110075565SYSTEM AND METHOD FOR CONTROL NETWORK DEVICE - A control system and method for reducing the amount of power consumption of a communication network is provided. The amount of traffic usage and power consumption of communication equipment in the communication network is collected and energy efficiency of the communication equipment is calculated. An operation of the communication equipment and a communication path or routing of the communication network are controlled according to the calculated energy efficiency. Therefore, an operation of unnecessary communication equipment is controlled, thereby reducing the power consumption of the communication network.03-31-2011

Hyung-Seok Han, Yongin-Si KR

Patent application numberDescriptionPublished
20110317573STATION DEVICE AND METHOD OF CHECKING COMMUNICATION PERFORMANCE THEREOF - A station device includes an output unit that outputs a massage, a communication unit that communicates with a wireless access point which is movable from one place to another place, a determination unit that determines current communication performance with the wireless access point, a storage unit that stores the determined current communication performance, and a controller that compares the current communication performance with pre-stored previous communication performance and controls the output unit to output a message according to a result of the comparison.12-29-2011
20120075286DISPLAY APPARATUS AND CONTROL METHOD THEREOF, SHUTTER GLASSES AND CONTROL METHOD THEREOF, AND DISPLAY SYSTEM - A display apparatus and a control method thereof, shutter glasses and a method of controlling the same, and a display system having the display apparatus and the shutter glasses. The display apparatus includes a display panel, a light source unit which generates light that is provide to the display panel to display an image on the display panel, and a controller which controls turning on and off of the light source unit based on a pattern corresponding to first information during a non-display period during which an image frame is not displayed on the display panel so an external device configured to detect light from the light source unit extracts the first information corresponding to a turning on and off pattern of the light source unit.03-29-2012

Hyung-Seok Hong, Ansan-Si KR

Patent application numberDescriptionPublished
20110121399COMPLEMENTARY METAL OXIDE SEMICONDUCTOR DEVICE HAVING METAL GATE STACK STRUCTURE AND METHOD OF MANUFACTURING THE SAME - A complementary metal oxide semiconductor (CMOS) device including: a semiconductor substrate including a NMOS region and a PMOS region; a NMOS metal gate stack structure on the NMOS region and including a first high dielectric layer, a first barrier metal gate on the first high dielectric layer and including a metal oxide nitride layer, and a first metal gate on the first barrier metal gate; and a PMOS metal gate stack structure on the PMOS region and including a second high dielectric layer, a second barrier metal gate on the second high dielectric layer and including a metal oxide nitride layer, and a second metal gate on the second barrier metal gate.05-26-2011
20110180879CMOS TRANSISTOR, SEMICONDUCTOR DEVICE INCLUDING THE TRANSISTOR, AND SEMICONDUCTOR MODULE INCLUDING THE DEVICE - Provided are a CMOS transistor, a semiconductor device having the transistor, and a semiconductor module having the device. The CMOS transistor may include first and second interconnection structures respectively disposed in first and second regions of a semiconductor substrate. The first and second regions of the semiconductor substrate may have different conductivity types. The first and second interconnection structures may be disposed on the semiconductor substrate. The first interconnection structure may have a different stacked structure from the second interconnection structure. The CMOS transistor may be disposed in the semiconductor device. The semiconductor device may be disposed in the semiconductor module.07-28-2011
20110237062Semiconductor Device And Method Of Fabricating The Same - A method of fabricating a semiconductor device includes forming an interlayer dielectric on a substrate, the interlayer dielectric including first and second openings respectively disposed in first and second regions formed separately in the substrate; fondling a first conductive layer filling the first and second openings; etching the first conductive layer such that a bottom surface of the first opening is exposed and a portion of the first conductive layer in the second opening remains; and forming a second conductive layer filling the first opening and a portion of the second opening.09-29-2011
20120122309METHOD OF FABRICATING SEMICONDUCTOR DEVICE USING A WORK FUNCTION CONTROL FILM - A method of fabricating a semiconductor device may include: preparing a substrate in which first and second regions are defined; forming an interlayer insulating film, which includes first and second trenches, on the substrate; forming a work function control film, which contains Al and N, along a top surface of the interlayer insulating film, side and bottom surfaces of the first trench, and side and bottom surfaces of the second trench; forming a mask pattern on the work function control film formed in the second region; injecting a work function control material into the work function control film formed in the first region to control a work function of the work function control film formed in the first region; removing the mask pattern; and forming a first metal gate electrode to fill the first trench and forming a second metal gate electrode to fill the second trench.05-17-2012

Hyung-Seok Hong, Seoul KR

Patent application numberDescriptionPublished
20100072556Semiconductor device and associated methods - A semiconductor device and associated methods, the semiconductor device including a semiconductor substrate with a first well region, a first gate electrode disposed on the first well region, and a first N-type capping pattern, a first P-type capping pattern, and a first gate dielectric pattern disposed between the first well region and the first gate electrode.03-25-2010
20100099245Methods of Forming Semiconductor Devices - Provided are a semiconductor device and a method of forming the same. The method may include forming a metal oxide layer on a substrate and forming a sacrificial oxide layer on the metal oxide layer. An annealing process is performed on the substrate. A formation-free energy of the sacrificial oxide layer is greater than a formation-free energy of the metal oxide layer at a process temperature of the annealing process.04-22-2010
20100099269SEMICONDUCTOR DEVICES AND METHODS OF FORMING THE SAME - Provided are a semiconductor device and a method of forming the same. The method may include forming a gate dielectric layer including a plurality of elements on a substrate; supplying a specific element to the gate dielectric layer; forming a product though reacting the specific element with at least one of the plurality of elements; and removing the product.04-22-2010
20100124805METHODS OF FORMING SEMICONDUCTOR DEVICES HAVING GATES WITH DIFFERENT WORK FUNCTIONS USING NITRIDATION - A semiconductor device that has a dual gate having different work functions is simply formed by using a selective nitridation. A gate insulating layer is formed on a semiconductor substrate including a first region and a second region, on which devices having different threshold voltages are to be formed. A diffusion inhibiting material is selectively injected into the gate insulating layer in one of the first region and the second region. A diffusion layer is formed on the gate insulating layer. A work function controlling material is directly diffused from the diffusion layer to the gate insulating layer using a heat treatment, wherein the gate insulting layer is self-aligned capped with the selectively injected diffusion inhibiting material so that the work function controlling material is diffused into the other of the first region and the second region. The gate insulating layer is entirely exposed by removing the diffusion layer. A gate electrode layer is formed on the exposed gate insulating layer. A first gate and a second gate having different work functions are respectively formed in the first region and the second region by etching the gate electrode layer and the gate insulating layer05-20-2010
20100164009Method of manufacturing dual gate semiconductor device - The method involves providing a semiconductor substrate comprising first and second regions in which different conductive metal-oxide semiconductor (MOS) transistors are to be formed. A gate dielectric layer above the semiconductor substrate sequentially forming a first metallic conductive layer and a second metallic conductive layer on and above the gate dielectric layer; covering the second region with a mask, and performing ion plantation of a first material into the first metallic conductive layer of the first region. Removing the second metallic conductive layer of the first region and forming a first gate electrode of the first region and a second gate electrode of the second region by patterning the gate dielectric layer and the first metallic conductive layer of the first region, and the gate dielectric layer, the first metallic conductive layer, and the second metallic conductive layer of the second region. The first and second regions of the semiconductor substrate having different work functions because the gate electrodes of the first and second regions have different thicknesses and at least one of the first and second gate electrodes include impurities.07-01-2010
20100203716METHOD OF FABRICATING SEMICONDUCTOR DEVICE HAVING DUAL GATE - A method of fabricating a semiconductor device having a dual gate allows for the gates to have a wide variety of threshold voltages. The method includes forming a gate insulation layer, a first capping layer, and a barrier layer in the foregoing sequence across a first region and a second region on a substrate, exposing the gate insulation layer on the first region by removing the first capping layer and the barrier layer from the first region, forming a second capping layer on the gate insulation layer in the first region and on the barrier layer in the second region, and thermally processing the substrate on which the second capping layer is formed. The thermal processing causes material of the second capping layer to spread into the gate insulation layer in the first region and material of the first capping layer to spread into the gate insulation layer in the second region. Thus, devices having different threshold voltages can be formed in the first and second regions.08-12-2010
20110217833METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE USING AN ETCHANT - In an etchant for etching a capping layer having etching selectivity with respect to a dielectric layer, the capping layer changes compositions of the dielectric layer, to thereby control a threshold voltage of a gate electrode including the dielectric layer. The etchant includes about 0.01 to 3 percent by weight of an acid, about 10 to 40 percent by weight of a fluoride salt and a solvent. Accordingly, the dielectric layer is prevented from being damaged by the etching process for removing the capping layer and the electric characteristics of the gate electrode are improved.09-08-2011
20110223758METHOD OF FABRICATING SEMICONDUCTOR DEVICE HAVING DUAL GATE - A method of fabricating a semiconductor device having a dual gate allows for the gates to have a wide variety of threshold voltages. The method includes forming a gate insulation layer, a first capping layer, and a barrier layer in the foregoing sequence across a first region and a second region on a substrate, exposing the gate insulation layer on the first region by removing the first capping layer and the barrier layer from the first region, forming a second capping layer on the gate insulation layer in the first region and on the barrier layer in the second region, and thermally processing the substrate on which the second capping layer is formed. The thermal processing causes material of the second capping layer to spread into the gate insulation layer in the first region and material of the first capping layer to spread into the gate insulation layer in the second region. Thus, devices having different threshold voltages can be formed in the first and second regions.09-15-2011
20120009746METHODS OF FORMING A SEMICONDUCTOR DEVICE - A semiconductor device and associated methods, the semiconductor device including a semiconductor substrate with a first well region, a first gate electrode disposed on the first well region, and a first N-type capping pattern, a first P-type capping pattern, and a first gate dielectric pattern disposed between the first well region and the first gate electrode.01-12-2012
20120012942SEMICONDUCTOR DEVICES AND METHODS OF FORMING THE SAME - Provided are a semiconductor device and a method of forming the same. The method may include forming a gate dielectric layer including a plurality of elements on a substrate; supplying a specific element to the gate dielectric layer; forming a product though reacting the specific element with at least one of the plurality of elements; and removing the product.01-19-2012

Patent applications by Hyung-Seok Hong, Seoul KR

Hyung-Seok Jang, Gyeonggi-Do KR

Patent application numberDescriptionPublished
20090310045LIQUID CRYSTAL DISPLAY DEVICE AND METHOD OF DRIVING THE SAME - A liquid crystal display device includes first and second substrates facing and spaced apart from each other, each of the first and second substrates having a first sub-pixel region, a second sub-pixel region, a third sub-pixel region, a fourth sub-pixel region and a fifth sub-pixel region for adjusting a viewing angle, the first, second, third and fourth sub-pixel regions surrounding the fifth sub-pixel region; a liquid crystal layer between the first and second substrates; a plurality of first pixel electrodes in each of the first, second, third and fourth sub-pixel regions on the first substrate; a plurality of first common electrodes in each of the first, second, third and fourth sub-pixel regions on the first substrate, the plurality of first common electrodes alternating with the plurality of first pixel electrodes; a second pixel electrode in the fifth sub-pixel region on the first substrate; and a second common electrode in the fifth sub-pixel region on the second substrate, the second common electrode facing the second pixel electrode.12-17-2009
20100141569LIQUID CRYSTAL DISPLAY DEVICE AND METHOD OF DRIVING THE SAME - A liquid crystal display device includes first and second substrates facing each other, a layer of liquid crystal molecules interposed between the first and second substrates, a plurality of color displaying sub-pixels including first, second and third sub-pixels defined on the first and second substrates, first common electrodes in the first, second and third sub-pixels on the first substrate, first pixel electrodes in the first, second and third sub-pixels on the first substrate and alternately arranged with the first common electrodes, color filter layers in the first, second and third sub-pixels on the second substrate, a plurality of viewing angle restricting sub-pixels including fourth, fifth and sixth sub-pixels defined on the first and second substrates, the fourth, fifth and sixth sub-pixels corresponding one-to-one with the first, second and third sub-pixels, second pixel electrodes in the fourth, fifth and sixth sub-pixels on the first substrate, and second common electrodes in the fourth, fifth and sixth sub-pixels on the second substrate.06-10-2010
20120094569LIQUID CRYSTAL DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF - Provided are an LCD device that can control a viewing angle freely and a manufacturing method thereof. The LCD device includes a first substrate, a second substrate, and an LC layer interposed between the first and second substrates. The LCD device further includes red, green, blue, and viewing angle controlling subpixels. These subpixels are driven in a VA mode. The red, green, and blue subpixels have a transflective structure. The viewing angle controlling subpixel has a transmissive or transflective structure.04-19-2012

Patent applications by Hyung-Seok Jang, Gyeonggi-Do KR

Hyung-Seok Kang, Yongin-Si KR

Patent application numberDescriptionPublished
20090231922Nonvolatile Memory Device and Read Method Thereof - Disclosed is a read method of a non-volatile memory device which includes performing a first read operation in which a first read voltage is applied to a selected word line. If a read fail arises at the first read operation, a second read operation is performed in which a second read voltage lower than the first read voltage is applied to the selected word line. If no read fail arises at the second read operation, the read fail generated at the first read operation is cured by performing a program operation.09-17-2009

Hyung-Seok Kang, Gyeonggi-Do KR

Patent application numberDescriptionPublished
20090052252METHODS OF APPLYING READ VOLTAGES IN NAND FLASH MEMORY ARRAYS - Provided is a method of improving the read disturb characteristics of a flash memory array. According to the method, in a flash memory array having at least one cell string in which a string selection transistor, a plurality of memory cells, and a ground selection transistor are connected in series, first read voltage is applied to a string selection line connected to a gate of the string selection transistor and a ground selection line connected to a gate of the ground selection transistor. Ground voltage is applied to a word line of a memory cell selected from among the memory cells. Second read voltage is applied to word lines of memory cells, from among the memory cells that are not selected, which are adjacent to the string selection transistor and the ground selection transistor. Then, the first read voltage is applied to the other memory cells that are not selected. The second read voltage is lower than the first read voltage.02-26-2009

Hyung-Seok Kim, Gyeonggi-Do KR

Patent application numberDescriptionPublished
20080305031System and Method For Producing Carbon Nanotubes - A system for producing carbon nanotubes includes a reaction chamber in which a process is performed for producing a carbon nanotube on a synthetic substrate; a station part disposed at one side of the reaction chamber and provided with a first transporter for loading/unloading the synthetic substrate to/from the reaction chamber; a first transporter installed inside the station part for loading/unloading synthetic substrates to/from the reaction chamber; a substrate accommodating part in which a substrate to be loaded to the reaction chamber is accommodated or a synthetic substrate unloaded from the reaction chamber waits; a retrieve part for drawing out a synthetic substrate from the substrate accommodating part to retrieve a carbon nanotube produced on the synthetic substrate; a catalyst coating unit configured for coating a synthetic substrate with a catalyst before the synthetic substrate is accommodated in the substrate accommodating part of the station part; and a second transporter for transporting a synthetic substrate between the retrieve part and the substrate accommodating part and between the catalyst coating unit and the substrate accommodating part.12-11-2008

Hyung-Seok Lee, Saha-Gu KR

Patent application numberDescriptionPublished
20100103426OPTICAL SENSOR INTERROGATION SYSTEM BASED ON FDML WAVELENGTH SWEPT LASER - Provided is an optical sensor interrogation system. The optical sensor interrogation system includes: a light source unit which matches round-trip time of light and wavelength tunable cycle time of light in a resonator and emits light; a sensing unit which receives an optical signal in which a center wavelength periodically tunes, from the light source unit and tunes the center wavelength of the optical signal according to physical changes applied from the outside; and a signal processing unit which receives the optical signal reflected from the sensing unit, detects data, and images the data. In particular, the light source unit includes a delaying unit which delays the round-trip time of light and a tunable filter which tunes the wavelength of light so as to match the round-trip time of light with the wavelength tunable cycle time of light. Accordingly, a Fourier domain mode locking (FDML) wavelength swept laser, which operates at speed of several tens kHz or above, is used as a light source so that strain of a fluid, which changes in a short time interval of 0.1 msec or below, is precisely measured and thus a real-time analysis may be performed at high speed.04-29-2010