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| 20110095892 | READER BASED ON RFID - Disclosed is an RFID-based reader configured to allow a UHF band RFID reader unit to recognize an RFID tag in a short distance, and to minimize an erroneous recognition, the reader including a gate frame discretely installed at both sides of an entrance and exit, a parabolic surface type reflective plate perpendicularly installed inside of the gate frame, an array antenna arranged on the reflective plate for receiving a tag information transmitted from an RFID tag, and an RFID reader unit for controlling an operation of the array antenna and converting the tag information received from the array antenna to a tag data. | 04-28-2011 |
| 20110216815 | METHOD AND APPARATUS FOR DETECTING OFFSET SIGNAL OF TRANSMISSION LEAKAGE SIGNAL IN RF TRANSCEIVER - Disclosed is an RF transceiver in which transmission and reception are simultaneously performed, wherein a magnitude of a transmission leakage signal mixed into a receiving signal is measured, the maximum and minimum scopes on I/Q vector phase-plane in which an offset vector exists is set using the measured magnitude of the transmission leakage signal, the offset vector offsetting the transmission leakage signal as much as possible, a detection area in which the offset vector exists is determined in the set scope, and the offset vector is detected. | 09-08-2011 |
| 20110227701 | GATE SYSTEM - Disclosed is a gate system arranged on two gate frames and detects a tag passing between the two gate frames, the gate system including at least two gate frames that are vertically arranged facing with each other; at least two antenna units that are arranged on the at least two gate frames, respectively; and a reader that is arranged on each of the at least two gate frames and enables the at least two antenna units to emit electromagnetic wave to an article passing between the at least two gate frames using a predetermined frequency signal, and obtains information stored in a tag using a signal that the at least two antenna units receives from the at least two antenna units. | 09-22-2011 |
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| 20090096112 | INTEGRATED CIRCUIT UNDERFILL PACKAGE SYSTEM - An integrated circuit underfill package system including providing a substrate having a dispense port, attaching a first integrated circuit die on the substrate, and supplying an underfill to the dispense port when the substrate and the first integrated circuit die are inverted. | 04-16-2009 |
| 20090194853 | SHIELDED STACKED INTEGRATED CIRCUIT PACKAGING SYSTEM AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of a shielded stacked integrated circuit packaging system includes forming a first integrated circuit structure having a first substrate and a first integrated circuit die; mounting a shield over the first substrate and the first integrated circuit die; mounting a second integrated circuit structure having a second substrate and a second integrated circuit die over the shield; and forming a package encapsulation for covering the first integrated circuit die, the shield, and the second integrated circuit structure. | 08-06-2009 |
| 20100171228 | INTEGRATED CIRCUIT PACKAGE SYSTEM AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit package system includes forming a substrate with a device thereover, forming an encapsulation having a planar top surface to cover the device and the substrate spanning to an extraction side of the encapsulation, and forming a recess in the encapsulation from the planar top surface. | 07-08-2010 |
| 20110298107 | SHIELDED STACKED INTEGRATED CIRCUIT PACKAGING SYSTEM AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of a shielded stacked integrated circuit packaging system includes: forming a first integrated circuit structure having a first substrate and a first integrated circuit die; mounting a shield over the first substrate and the first integrated circuit die; mounting a second integrated circuit structure having a second substrate and a second integrated circuit die over the shield; and forming a package encapsulation for covering the first integrated circuit die, the shield, and the second integrated circuit structure. | 12-08-2011 |
| 20120077529 | APPARATUS AND METHOD FOR UPDATING DATA IN PORTABLE TERMINAL - An apparatus and method update data in a portable terminal. The apparatus comprises a data update unit and a controller. The data unit is configured to manage information associated with the portable terminal and a request for an address book update transmitted from the portable terminal. The controller is configured to receive changed address book information from an update server that manages an address book of another portable terminal in response to the request transmitted by the data update unit. | 03-29-2012 |
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| 20110107854 | JIG FOR COMPRESSION TEST IN A HEATING FURNACE - Provided is a jig for a compression test in a heating furnace capable of variously changing boundary conditions such as a both-end hinge, a both-end fixing, or one-end hinge and one-end fixing through simple attachment and detachment of a holder. | 05-12-2011 |
| 20110110393 | HEATING FURNACE FOR TESTING MIDDLE AND LONG SPAN STRUCTURES - Provided is a heating furnace for testing middle and long span structures including a modular partition structure to adjust an inner volume of the heating furnace, effectively performing a load-coupled heating test of full scale members such as a beam, a short column, a slab, a conjunction frame, and a deck plate. | 05-12-2011 |
| 20110126635 | APPARATUS FOR TESTING TENSILE STRENGTH UNDER HIGH TEMPERATURE CONDITION AND UNIT FOR MEASURING ELONGATION PROVIDED IN THE SAME - Provided are an apparatus for testing a tensile strength under a high temperature condition and a unit for measuring elongation provided in the same. The apparatus for testing a tensile strength under a high temperature condition includes a base frame part, a test sample loader and a cylinder part connected to the base frame part and applying a tensile force to a test sample, and a heater for forming a high temperature condition to the test sample. The unit for measuring elongation includes a movable frame, a vertical bar, and a measurement head part connected to the vertical bar to measure elongation of the test sample and blocking heat from the heater. Therefore, since a tensile strength and elongation of the test sample can be measured under a high temperature condition, it is possible to recognize deformation characteristics of a material due to a fire and prevent deformation of or damage to the elongation measurement unit even under the high temperature condition, improving durability and reliability of the apparatus. | 06-02-2011 |
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| 20100270552 | THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A protrusion of dry-etched pattern of a thin film transistor substrate generated due to a difference between isotropy of wet etching and anisotropy of dry etching is removed by forming a plating part on a surface of the wet etched pattern through an electroless plating method. If the plating part is formed on a data pattern layer of the substrate, the width or the thickness of the data pattern layer may be increased without loss of aperture ratio, the channel length of the semiconductor layer may be reduced under the limit according to the stepper resolution and the protrusion part of the semiconductor layer may be removed. As a result, the aperture ratio may be increased, the resistance may be reduced, and the driving margin may be increased due to rising of the ion current. Furthermore, the so-called water-fall noise phenomenon may be eliminated. | 10-28-2010 |
| 20110181557 | DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A display substrate includes a base substrate, a first insulating layer formed on a base substrate, a pixel including a pixel electrode having the first insulating layer, and a circuit including a circuit transistor disposed on a peripheral area to drive the pixel. The pixel includes a first channel formed on the base substrate having the first insulating layer formed thereon. The first channel includes a poly-silicon layer, a first source electrode and a first drain electrode formed on the first channel that are spaced apart from each other, and a first gate electrode formed on the first source electrode and the first drain electrode corresponding to the first channel which is formed of the transparent conductive material. The poly-silicon layer is formed at a front channel portion of the first channel proximal to the first gate electrode through the first gate electrode. | 07-28-2011 |
| 20120043545 | THIN FILM TRANSISTOR DISPLAY PANEL AND MANUFACTURING METHOD THEREOF - A thin film transistor display panel includes a substrate, a gate wire on the substrate and including a gate line and a gate electrode; a gate insulating layer on the gate wire; a semiconductor layer on the gate insulating layer; a data wire including a source electrode on the semiconductor layer, a drain electrode opposing the source electrode with respect to the gate electrode, and a data line; a passivation layer on the data wire having a contact hole exposing the drain electrode; and a pixel electrode on the passivation layer and connected to the drain electrode through the contact hole. The gate wire has a first region and second region where the gate line and the gate electrode are positioned, respectively. The thickness of the gate wire in the first region is greater than the thickness of the gate wire in the second region. | 02-23-2012 |
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| 20110090443 | LIQUID CRYSTAL DISPLAY - The present invention relates to a liquid crystal display. The liquid crystal display includes a first substrate and a second substrate facing each other; a liquid crystal layer interposed between the first substrate and the second substrate; a sealant coupling the first substrate and the second substrate and enclosing the liquid crystal layer; a display signal line arranged on the first substrate and including an end portion; and a first spacer disposed between the end portion of the display signal line and the sealant. The liquid crystal layer includes liquid crystal molecules exhibiting a pretilt alignment with respect to the first and second substrates. | 04-21-2011 |
| 20120062523 | LIQUID CRYSTAL DISPLAY AND DRIVING METHOD THEREOF - A liquid crystal display, the liquid crystal display comprises a plurality of gate lines which includes a first gate line, a transformation gate line, and a second gate line; a data line; and a pixel, wherein the pixel includes a first liquid crystal capacitor which includes a first sub-pixel electrode and a common electrode and a second liquid crystal capacitor which includes a second sub-pixel electrode and a common electrode; a first switching element connected to the first gate line, the data line, and the first sub-pixel electrode; a second switching element connected to the first gate line, the data line, and the second sub-pixel electrode; a third switching element connected to the transformation gate line and the second switching element; a transformation capacitor which includes a first terminal connected to the second gate line and a second terminal connected to the third switching element; and a first period where a gate-on voltage Von is applied to the first gate line and a second period where the gate-on voltage Von is applied to the transformation gate line do not overlap each other and, a gate-off voltage Voff is applied to the second gate line during the second period. | 03-15-2012 |
| 20120105398 | GATE DRIVING CIRCUIT AND DISPLAY APPARATUS HAVING THE SAME - Provided is a gate driving circuit including cascade-connected stages that output gate signals. An n-th one of the stages (“n” is a natural number) includes a pull-up part, a pull-up controller, a first pull-down part, a second pull-down part, and a pull-down controller. The pull-up part outputs a first clock signal as an output signal of the n-th stage. The pull-up controller selectively applies first and second powers to a control electrode of the pull-up part. The first pull-down part pulls down a voltage applied to the control electrode of the pull-up part to an off voltage. The second pull-down part pulls down a voltage applied to an output electrode of the pull-up part to the off voltage. The pull-down controller selectively applies the first and second powers to control electrodes of the first and second pull-down parts. | 05-03-2012 |
