| Patent application number | Description | Published |
|---|
| 20090072719 | Passivation film and electronic display device including the passivation film - Example embodiments relate to a passivation film for protecting an electronic device. The passivation film may include a myelin layer. The myelin layer may have a thickness of about 100 Å to 10 μm. The passivation film may further include an inorganic film. Example embodiments also relate to an electronic display device including a substrate, an organic light-emitting device (OLED) disposed on the substrate, and a myelin layer disposed on the organic light-emitting device. A plurality of myelin layers and a plurality of inorganic films may be alternately stacked on the organic light-emitting device in lieu of a single myelin layer. | 03-19-2009 |
| 20090239115 | HETEROATOM-CONTAINING MESOPOROUS CARBON, METHOD OF PREPARING THE SAME, AND FUEL CELL USING THE HETEROATOM-CONTAINING MESOPOROUS CARBON - A heteroatom-containing mesoporous carbon has a pore diameter of 11 to 35 nm, has a specific surface area of 500 m | 09-24-2009 |
| 20090317663 | MAGNETIC RECORDING MEDIUM - Provided is a magnetic recording medium. The magnetic recording medium includes a substrate, a recording layer disposed on the substrate for magnetic recording, and a carbon protection layer, which includes a carbon layer and a blocking layer disposed in the carbon layer to block infiltration of external impurities, disposed on the recording layer. Since the blocking layer is disposed in the carbon layer, a thickness of the carbon protection layer can be reduced while a sufficient hardness to protect the recording layer can be ensured, and moreover, a softness of the surface of the carbon protection layer can be improved. | 12-24-2009 |
| 20100108972 | NON-VOLATILE SEMICONDUCTOR MEMORY DEVICES - A non-volatile semiconductor memory device includes a lower electrode, an upper electrode, a resistive layer pattern between the lower electrode and the upper electrode, and a filament seed embedded in the resistive layer pattern. The filament seed includes at least one of a carbon nanotube, a nanowire and a nanoparticle. | 05-06-2010 |
| 20100123198 | Semiconductor devices and methods of manufacturing the same - Provided are semiconductor devices having low resistance contacts and methods of manufacturing the same. One or more of the semiconductor devices include a substrate having first and second active regions; a P-channel field-effect transistor associated with the first active region and including at least one of the source and drain regions; a N-channel field-effect transistor associated with the second active region and including at least one of the source and drain regions; a first contact pad layer comprising silicon (Si) and SiGe epitaxial layers on the at least one of the source and drain regions of the P-channel field-effect transistor, the SiGe epitaxial layer being sequentially stacked on the Si epitaxial layer; a second contact pad layer comprising silicon (Si) and SiGe epitaxial layers on the at least one of the source and drain regions of the N-channel field-effect transistor, the SiGe epitaxial layer being sequentially stacked on the Si epitaxial layer; an interlayer insulating film formed on the P-channel and the N-channel field-effect transistors and including first and second contact holes, wherein the first contact hole includes a first lower region that exposes the SiGe epitaxial layer of the first contact pad layer and the second contact hole includes a second lower region that penetrates through the SiGe epitaxial layer of the second contact pad layer to expose the Si epitaxial layer of the second contact pad layer; first and second metal silicide films formed respectively in the first and second lower regions of the contact holes; and contact plugs formed on the first and second metal silicide films and filled in the first and second contact holes. | 05-20-2010 |
| 20100200907 | Semiconductor Integrated Circuit Device and Method of Fabricating the Same - A semiconductor integrated circuit device is provided. The semiconductor integrated circuit device includes a plurality of isolation regions which are formed within a semiconductor substrate and define active regions. A tunnel layer and a trap seed layer are formed in each of the active regions and are sequentially stacked between the isolation regions. A trap layer is formed on the trap seed layer and protrudes further than a top surface of each of the isolation regions. A blocking layer is formed on the trap layer. A gate electrode is formed on the blocking layer. | 08-12-2010 |
| 20110001183 | Memory device and method of fabricating the same - A memory device and a method of fabricating the same are provided. The memory device includes a tunneling dielectric layer on a substrate, a charge storage layer on the tunneling dielectric layer, a blocking dielectric layer on the charge storage layer, the blocking dielectric layer including a first dielectric layer having silicon oxide, a second dielectric layer on the first dielectric layer and having aluminum silicate, and a third dielectric layer formed on the second dielectric layer and having aluminum oxide, and an upper electrode on the blocking dielectric layer. | 01-06-2011 |
| 20120003799 | Methods of manufacturing semiconductor devices with Si and SiGe epitaxial layers - Methods of manufacturing semiconductor devices may include forming a first layer on a first active region (P-channel FET), forming a second layer on a second active region (N-channel FET), the first and second layers including a silicon germanium (SiGe) epitaxial layer sequentially stacked on a silicon (Si) epitaxial layer, forming a first contact hole in an interlayer insulating film including a first lower region exposing the SiGe epitaxial layer of the first layer, forming a second contact hole in the interlayer insulating film including a second lower region penetrating through the SiGe epitaxial layer of the second layer and exposing the Si epitaxial layer of the second layer, forming a first metal silicide film including germanium (Ge) in the first lower region, forming a second metal silicide film not including Ge in the second lower region simultaneously with the forming of the first metal silicide film. | 01-05-2012 |
