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Hyun Park
Hyun Park, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20090166868 | Semiconductor devices including metal interconnections and methods of fabricating the same - A semiconductor device includes a first interlayer dielectric including a trench on a semiconductor layer, a mask pattern on the first interlayer dielectric, a first conductive pattern in the trench, and a second interlayer dielectric on the mask pattern. The second interlayer dielectric includes an opening over the first conductive pattern. A second conductive pattern is in the opening and is electrically connected to the first conductive pattern. The first conductive pattern has an upper surface lower than an upper surface of the mask pattern. | 07-02-2009 |
| 20100237504 | Methods of Fabricating Semiconductor Devices Having Conductive Wirings and Related Flash Memory Devices - A conductive wiring for a semiconductor device is provided including a semiconductor substrate and a plurality of lower conductive structures on the semiconductor substrate. An insulating layer is provided that electrically insulates the plurality of lower conductive structures from one another. A first insulation interlayer pattern is provided on the insulation layer. The first insulation interlayer pattern includes a contact plug that contacts the substrate through the insulation layer. An etch-stop layer is provided on the contact plug and the first insulation interlayer pattern. A second insulation interlayer pattern is provided on the etch-stop layer. The second insulation interlayer pattern includes a conductive line that is electrically connected to the contact plug. Related methods and flash memory devices are also provided. | 09-23-2010 |
Hyun Park, Cheonan-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20090244424 | LIQUID CRYSTAL DISPLAY, THIN FILM TRANSISTOR SUBSTRATE AND METHOD THEREOF - A liquid crystal display (“LCD”) capable of improving display quality includes a first insulating substrate, gate wiring lines formed on the first insulating substrate and extending in a first direction, pixel electrodes, each of which includes first and second sub-pixel electrodes that are, respectively, applied with different data voltages from first and second wiring lines insulated from and crossing the gate wiring lines, extending in a second direction and an insulting layer interposed between the first data wiring line and the second data wiring line overlapped by the first data wiring line. Therefore, an aperture ratio of the LCD increase because the first data wiring line overlapped the second data wiring line have less area between pixel electrodes. A display quality of the LCD improves. | 10-01-2009 |
| 20100134745 | LIQUID CRYSTAL DISPLAY AND MANUFACTURING METHOD THEREOF - A liquid crystal display (LCD) includes a first substrate including a display area displaying images and a peripheral area surrounding the display area, a common pad formed in the peripheral area of the first substrate, an insulating layer formed on the common pad and having a common contact hole exposing the common pad, an assistance common pad formed on the insulating layer of the peripheral area and contacting the common pad through the common contact hole, a second substrate corresponding to the first substrate, and a common electrode formed on the second substrate, and a conductive sealant disposed between the assistance common pad and the common electrode of the peripheral area, the conductive sealant electrically connecting the assistance common pad and the common electrode, wherein the common contact hole is disposed between the conductive sealant and the display area. | 06-03-2010 |
Hyun Park, Gyeongsangbuk-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20100182096 | Ultra-Wideband Balun and Application Module Thereof - A first transmission line is formed on a first surface of a substrate. A first end of the first transmission line is connected to a transmission line of an unbalanced line. A second end is connected to a first transmission line of a balanced line. A second transmission line extends from a first end of the unbalanced line, alongside the first transmission line and spaced therefrom, and is connected to a second of the transmission lines of the balanced line. A ground plane is formed on a second surface of the substrate, extends from a first end of the balanced line, and is formed along the second transmission line to which the ground plane is connected through one or more vias. A width of a portion of the ground plane adjacent to the unbalanced line is greater than a portion thereof adjacent to the balanced line. | 07-22-2010 |
Hyun Park, Seoul KR
| Patent application number | Description | Published |
|---|---|---|
| 20090016560 | Spring reverberator and assembling method thereof - The present invention discloses a spring reverberator and an assembling method thereof, in which the spring reverberator comprises: a casing, a driving transducer received in the casing, a pickup transducer received in the casing, and coil springs vibratingly coupled to the driving and pickup transducers. The driving and pickup transducers respectively include a vibration unit and a magnetic core. The vibration unit comprises a support plate including at least one cut-out groove, through which a wire is soldered directly to the support plate. The vibration unit and the magnetic core are prepared in a modular type to be inserted in a sliding manner and fixed in the casing. | 01-15-2009 |
| 20090285112 | METHOD FOR MANAGING A RELAY PATH IN WIRELESS COMMUNICATION ENVIRONMENT - A method of managing a relay path in a mobile multi-hop relay (MMR) environment is provided. A relay station (RS) discovers a link quality of neighboring RSs, which is necessary for managing a path, and reports the link quality to a base station (BS). The BS selects an optimal path having a tree-structure based on the reported link quality and informs the RS. Thus, wireless resources can be efficiently used. | 11-19-2009 |
Hyun Park, Hwaseong-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20090258473 | Nonvolatile memory device and method of manufacturing the same - Example embodiments provide a nonvolatile memory device and a method of manufacturing the same. A floating gate electrode of the nonvolatile memory device may have a cross-shaped section as taken along a direction extending along a control gate electrode. The floating gate electrode may have an inverse T-shaped section as taken along a direction extending along an active region perpendicular to the control gate electrode. The floating gate electrode may include a lower gate pattern, a middle gate pattern and an upper gate pattern sequentially disposed on a gate insulation layer, in which the middle gate pattern is larger in width than the lower gate pattern and the upper gate pattern. A boundary between the middle gate pattern and the upper gate pattern may have a rounded corner. | 10-15-2009 |
Hyun Park, Busan KR
| Patent application number | Description | Published |
|---|---|---|
| 20090203824 | ANTIFOULING PAINT COMPOSITION - The present invention relates to an antifouling paint composition which is pro-environmental because it does not contain organotin and copper compound which are the major causes of maritime environmental pollution, and has excellent inhibitory effect on the adhesion of marine organisms on the surface. The antifouling paint composition of the present invention characteristically comprises a resin, tourmaline and an alkali metal, an alkali earth metal and/or an oxide thereof. | 08-13-2009 |
Hyun Park, Jincheon-Gun KR
| Patent application number | Description | Published |
|---|---|---|
| 20090061616 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating semiconductor device capable of minimizing hillocks and voids. The method includes subjecting an interlayer dielectric having a multi-protective dielectric structure including a first barrier metal layer and a first copper line to a plurality of NH | 03-05-2009 |
Hyun Park, Hwangseong-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20090004826 | Method of manufacturing a semiconductor device - In a method of manufacturing a semiconductor device, a first substrate and a second substrate, which include a plurality of memory cells and selection transistors, respectively, are provided. A first insulating interlayer and a second insulating interlayer are formed on the first substrate and the second substrate, respectively, to cover the memory cells and the selection transistors. A lower surface of the second substrate is partially removed to reduce a thickness of the second substrate. The lower surface of the second substrate is attached to the first insulating interlayer. Plugs are formed through the second insulating interlayer, the second substrate and the first insulating interlayer to electrically connect the selection transistors in the first substrate and the second substrate to the plugs. Thus, impurity ions in the first substrate will not diffuse during a thermal treatment process. | 01-01-2009 |